512Mb, 1Gb, 2Gb: P30-65nm
AC Read Specifications
AC Read Specifications
Table 39: AC Read Specifications
Parameter
Asynchronous Specifications
READ cycle time
t
AVAV
Symbol
Easy BGA
TSOP
512Mb/1Gb
2Gb
512Mb/1Gb
512Mb/1Gb
2Gb
TSOP
512Mb/1Gb
512Mb/1Gb
2Gb
TSOP
512Mb/1Gb
Min
100
105
110
–
–
–
–
–
–
-
-
0
0
–
–
0
Max
–
–
–
100
105
110
100
105
110
25
150
–
–
20
15
–
Unit
ns
Notes
–
Address to output valid
t
AVQV
Easy BGA
ns
–
CE# LOW to output valid
t
ELQV
Easy BGA
ns
ns
ns
ns
ns
ns
ns
ns
ns
–
–
1, 2
1
1, 3
1, 2, 3
1, 3
OE# LOW to output valid
RST# HIGH to output valid
CE# LOW to output in Low-Z
OE# LOW to output in Low-Z
CE# HIGH to output in High-Z
OE# HIGH to output in High-Z
Output hold from first occur-
ring address, CE#, or OE#
change
CE# pulse width HIGH
CE# LOW to WAIT valid
CE# HIGH to WAIT High-Z
OE# LOW to WAIT valid
OE# LOW to WAIT in Low-Z
OE# HIGH to WAIT in High-Z
Address setup to ADV# HIGH
CE# LOW to ADV# HIGH
ADV# LOW to output valid
t
GLQV
t
PHQV
t
ELQX
t
GLQX
t
EHQZ
t
GHQZ
t
OH
t
EHEL
t
ELTV
t
EHTZ
t
GLTV
t
GLTX
t
GHTZ
17
–
–
–
0
–
10
10
Easy BGA
TSOP
512Mb/1Gb
2Gb
512Mb/1Gb
–
–
–
10
10
9
–
30
–
17
20
17
–
20
–
–
100
105
110
–
–
–
25
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
1, 3
1
1, 3
Latching Specifications (Easy BGA)
t
AVVH
t
ELVH
t
VLQV
1
ADV# pulse width LOW
ADV# pulse width HIGH
Address hold from ADV# HIGH
Page address access
RST# HIGH to ADV# HIGH
Clock Specifications (Easy BGA)
t
VLVH
t
VHVL
t
VHAX
t
APA
t
PHVH
1, 4
1
PDF: 09005aef845667b3
p30_65nm_MLC_512Mb-1gb_2gb.pdf - Rev. B 12/13 EN
78
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2013 Micron Technology, Inc. All rights reserved.
MICRON [ MICRON TECHNOLOGY ]
