欢迎访问ic37.com |
会员登录 免费注册
发布采购

ACE9030M 参数 Datasheet PDF下载

ACE9030M图片预览
型号: ACE9030M
PDF下载: 下载PDF文件 查看货源
内容描述: 无线接口和双合成器 [Radio Interface and Twin Synthesiser]
分类和应用: 无线
文件页数/大小: 39 页 / 382 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
 浏览型号ACE9030M的Datasheet PDF文件第1页浏览型号ACE9030M的Datasheet PDF文件第2页浏览型号ACE9030M的Datasheet PDF文件第3页浏览型号ACE9030M的Datasheet PDF文件第4页浏览型号ACE9030M的Datasheet PDF文件第6页浏览型号ACE9030M的Datasheet PDF文件第7页浏览型号ACE9030M的Datasheet PDF文件第8页浏览型号ACE9030M的Datasheet PDF文件第9页  
ACE9030
ELECTRICAL CHARACTERISTICS
These characteristics apply over these ranges of conditions (unless otherwise stated):
T
AMB
= – 40
°C
to + 85
°C,
V
DD
= + 3·6 to + 5·0 V, GND ref. = V
SS
D.C. Characteristics
Parameter
Power supply
Supply current, Radio Interface:
Sleep mode
Fully operating (excluding I
DDX
)
Supply current, Synthesisers: V
DD
=5V
Main and Auxiliary ON
Main ON and Auxiliary in Standby
Main in Standby and Auxiliary ON
Main and Auxiliary in Standby, with Bandgap off
Supply current, Synthesisers:
Main and Auxiliary ON
Main ON and Auxiliary in Standby
Main in Standby and Auxiliary ON
Main and Auxiliary in Standby
Input and output signals
Logic input HIGH (LATCHC, LATCHB, DATA,
CL, and TEST)
Logic input LOW (LATCHC, LATCHB, DATA,
CL, and TEST)
Input capacitance (signal pins)
Input leakage (signal pins)
Logic output HIGH (RXCD, DATA, AFCOUT,
TEST and DOUT2, 3 and 4)
Logic output LOW (RXCD, DATA, AFCOUT,
TEST and DOUT2, 3 and 4)
Output ON level, DOUT0 and DOUT1
Output HIGH level, DOUT5, 6 and 7
Output LOW level, DOUT5, 6 and 7
Trimmed output level ON, DOUT8
Level difference, DOUT8 ON – ADC reference
Output level OFF, DOUT8
MODMP, MODMN output HIGH
MODMP, MODMN output LOW
Input Schmitt Hysteresis, pins CL, LATCHB,
LATCHC, DATA.
Analog circuits bias resistor on I
REF
Min.
Typ.
Max.
Unit
Conditions
2.3
2·7
7
5
3.7
3
100
mA
mA
mA
mA
mA
µA
mA
mA
mA
µA
XO, OSC8 on
(see Note 1)
f
REF
= 10 MHz
f
MAIN
= 10 MHz
f
AUX
= 10 MHz
(see Note 2)
f
REF
= 15 MHz
f
MAIN
= 16 MHz
f
AUX
= 90 MHz
(see Note 2)
3
2
2
100
0·7 x V
DD
– 0·3
V
DD
+ 0·3
+ 0·8
10
1
V
V
pF
µA
V
V
V
V
V
V
mV
V
V
V
V
kΩ
kΩ
Pin voltage
V
SS
to V
DD
External load:
20 kΩ & 30 pF
I
OH
= 20 mA.
I
OH
= 80
µA
I
OL
= 0.2
µA
I
OH
= 135 to 400
µA.
V
DD
– 0·5
0·4
V
DDX
– 0·2
2·3
3·35
–5
V
DD
/2 + 0·35
V
DD
/2 – 1·0
0·3
68
100
2·9
0·3
3·55
+ 15
0.4
V
DD
/2 + 1·0
V
DD
/2 – 0·35
I
OH
= 10
µA
I
OL
= – 10
µA
V
DD
@ 3·75 V
V
DD
@ 4·85 V
Notes
1. The sleep current is specified with the crystal oscillator (XO) and the OSC8 oscillator and PLL running as these are normally needed to provide
the clock to the system controller.
2. The terms f
REF
, f
MAIN
, and f
AUX
refer to the frequencies of the Reference inputs (Crystal oscillator, pins CIN1 and CIN2), the Main synthesiser
inputs (pins FIM and FIMB) and the Auxiliary synthesiser inputs (pins FIA and FIAB) respectively.
5