ACE9030
ELECTRICAL CHARACTERISTICS
These characteristics apply over these ranges of conditions (unless otherwise stated):
T
AMB
= – 40
°C
to + 85
°C,
all V
DD
= + 3·6 to + 5·0 V, GND ref. = V
SS
A.C. Characteristics (continued)
Parameter
LO2 Multiplier
Amplitude
Reference frequency content of output
2nd, 4th harmonic content of output
5th harmonic of output
6th and higher harmonics in output
SYNTHESISERS
Reference divider
Reference divider input frequency
Drive level into CIN1 from external oscillator
CIN1 input capacitance
CIN1 input resistance
Auxiliary synthesiser
FIA input frequency
Rise and fall times of inputs
Timing Skew between FIA and FIAB
Min.
235
Typ.
Max.
500
-10.5
-13.5
-15
-20
Unit
Conditions
mV
rms
Circuit as in fig. 15,
dBc
dBc
dBc
dBc
5
400
30
10
10
10
135
10
±
2
or
±
10%
MHz
mV
pk-pk
With crystal oscillator
powered down
pF
kΩ
MHz
ns
ns
signal
period
mV
pk-pk
mV
pk-pk
mV
pk-pk
mV
pk-pk
May be a sinewave
See Fig. 6
Both maxima
must be met
Each input, 5 to 50 &
99 to 135 MHz
Each input,
50 to 99 MHz
One input, 5 to 50 &
99 to 135 MHz
One input,
50 to 99 MHz
V
DD
= 3.6V
V
DD
= 5V
FIA, FIAB differential signal level with both
sides driven
180
100
FIA single input drive level with FIAB
decoupled to V
SS
360
200
FIA, FIAB common mode range
FIA, FIAB common mode range
FIA, FIAB input capacitance
FIA, FIAB differential input resistance
Auxiliary Synthesiser comparison frequency
Main Synthesiser
FIM input frequency
Rise and fall times of inputs
FIM - FIMB Timing Skew
V
DD
– 1·7
2.8
10
V
DD
– 0·7
V
DD
– 0·85
10
2
V
V
pF
kΩ Note 8
MHz
MHz
ns
ns
signal
period
mV
pk-pk
mV
pk-pk
4
20
50
±
2
or
±
10%
FIM, FIMB differential signal level
with both sides driven.
FIM single input drive level
with FIMB decoupled to V
SS
FIM, FIMB common mode range
FIM, FIMB common mode range
FIM, FIMB input capacitance
FIM, FIMB differential input resistance
Delay FIM rising to MODMP/MODMN changing
Main Synthesiser comparison frequency
100
200
V
DD
– 1·7
2·8
10
30
2
1000
V
DD
– 0·7
V
DD
– 0·85
10
V
V
pF
kΩ Note 8
ns
MHz
See Fig. 6
Both maxima
must be met
Each input,
4 to 20 MHz
One input,
4 to 20 MHz
V
DD
=3.6V
V
DD
=5V
Note
8. To simplify single ended drive there is a resistor between FIA and FIAB and another between FIM and FIMB. In this mode the inputs should
drive FIA or FIM with D.C. coupling and the other inputs FIAB and FIMB should be decoupled to ground by external capacitors.
9
MITEL [ MITEL NETWORKS CORPORATION ]
