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ACE9030M/IW/FP1N 参数 Datasheet PDF下载

ACE9030M/IW/FP1N图片预览
型号: ACE9030M/IW/FP1N
PDF下载: 下载PDF文件 查看货源
内容描述: 无线接口和双合成器 [Radio Interface and Twin Synthesiser]
分类和应用: 电信集成电路无线
文件页数/大小: 39 页 / 382 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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ACE9030
ELECTRICAL CHARACTERISTICS
These characteristics apply over these ranges of conditions (unless otherwise stated):
T
AMB
= – 40
°C
to + 85
°C,
V
DD
= + 3·6 to + 5·0 V, GND ref. = V
SS
D.C. Characteristics (continued)
Parameter
Synthesiser charge pump current
Current setting resistor R
SMA
Current setting resistor R
SC
External capacitance on pin R
SMA
External capacitance on pin R
SC
Bias current I
RSMA
(nominally 1·25V / R
SMA
)
Bias current I
RSC
(nominally 1·25V / R
SC
)
Iprop(0) scaling accuracy, pin PDP
Iprop(1) scaling accuracy, pin PDP
Iint scaling accuracy, pin PDI
Icomp(0) scaling accuracy, pin PDP
Icomp(1) scaling accuracy, pin PDP
Icomp(2) scaling accuracy, pin PDI
Iauxil scaling accuracy, pin PDA
Auxiliary Charge Pump,
Up or Down I
AUX
current variation
Main Charge Pumps,
Up or Down I
MAIN
or I
INTEGRAL
current variation
Iprop(0) or Iprop(1) setting from PDP pin
Iint setting from PDI pin
Icomp(0) or Icomp(1) setting from PDP pin
Icomp(2) setting from PDI pin
Iauxil setting from PDA pin
Min.
19
19
Typ.
39
39
Max.
78
78
5
5
35·2
35·2
+10
+10
+10
+10
+10
+10
+5
+10
+10
1·0
5
12
180
512
Unit
kΩ
kΩ
pF
pF
µA
µA
%
%
%
%
%
%
%
%
%
mA
mA
µA
µA
µA
Conditions
Note 3
Note 3
Ensures stable
bias current.
R
SMA
= 39 kΩ
R
SC
= 39 kΩ
@ 200
µA.
Note 4
@ 800
µA.
Note 4
@ 4 mA. Note 4
@ ACC x 0·2
µA
Note 4
@ ACC x 0·8
µA
Note 4
@ ACC x 4
µA
Note 4
@ 256
µA.
Note 4
Note 5
Note 6
28·8
28·8
–10
–10
–10
–10
–10
–10
–5
–10
–10
32
32
Notes
3. The circuit is defined with resistors R
SMA
and R
SC
connected from pins RSMA and RSC to V
SSSA
but in most practical applications all V
SS
pins
will be connected to a ground plane so R
SMA
and R
SC
should then also be connected to this ground plane.
4. The charge pump currents are specified to this accuracy when the relevant output pin is at a potential of V
DD
/2 and with R
SMA
= 39 kΩ, CN
= 200, L= 1, K = 5, R
SC
= 19 kΩ. The nominal value is set by external resistors and by programming registers, as defined in Table 6. Tolerances
in the internal Bandgap voltage and bias circuits are within the limits given for I
RSMA
and I
RSC
, the scaling accuracy of the multiplying DAC’s
is within these limits given for Iprop(0), Iprop(1), Iint, Icomp(0), Icomp(1), Icomp(2), and auxil.
5. The Auxiliary charge pump output voltage is referred to as V
PDA
and the output current I
AUX
is the Up or Down current measured when
V
PDA
= V
DD
/2.
The conditions for the variation limits for the Up current are:
either
I
AUX
= 128 or 256
µA
and
0 < V
PDA
< V
DD
– 0·5 V
or
I
AUX
= 512
µA
and
0 < V
PDA
< V
DD
– 0·65 V
The conditions for the variation limits for the Down current are:
either
I
AUX
= 128 or 256
µA
and
0·5 V < V
PDA
< V
DD
or
I
AUX
= 512
µA
and
0·65 V < V
PDA
< V
DD
6. The Main charge pump output voltage at pin PDP is referred to as V
PDP
and at pin PDI as V
PDI.
The output currents I
MAIN
and I
INTEGRAL
are the
up or down current Iprop(0), Iprop(1) or Iint measured when V
PDP
or V
DPI
= V
DD
/2.
The conditions for the variation limits for the Up current are :
I
MAIN
= 100 to 1000
µA
or I
INTEGRAL
= 1 to 5 mA and 0 < V
PDP
< V
DD
– 0·45 V
The conditions for the variation limits for the Down current are:
I
MAIN
= 100 to 1000
µA
or I
INTEGRAL
= 1 to 5 mA and 0·45 V < V
PDP
< V
DD
6