MT90210
Preliminary Information
2M ts
Frame n, channel 31
Frame n+1, channel 0
8M ts
P7:P0
ch 124
ch 125
ch 126
ch 127
ch 0
ch 1
ch 2
ch 3
3 channel delay for 8 Mb/s rate
"a" denotes data for S0-S3
"b" denotes data for S4-S7
"c" denotes data for S8-S11
"d" denotes data for S12-S15
Finished reading last channel of 8Mb/s
and 4 quarter of last channel of 2 Mb/s of one complete frame(125 us)
th
RBC
WBC
Finished writing last channel of 8 Mb/s
th
and 4 quarter of last channel of 2 Mb/s
R/W1
R/W2
STROBE
Figure 13 - Mode 4 and Mode 5 Read/Write Timing
Memory Address Location Formula
for Block 0
Memory Address Location Formula
for Block 1
Mode
TX/RX
1
TX
RX
TX
RX
TX
RX
TX
RX
TX
RX
24C + S
24C + S + 0400h
24C + S
24C + S + 800h
24C + S + C00h
1
2
24C + S + 1000h
24C + S + 1800h
12C + S + 1000h
12C + S + 1800h
16C + S + 1000h
16C + S + 1800h
8C + (S-16) + 1400h
8C + (S-16) + 1C00h
2
24C + S + 0800h
12C + S
3
3
12C + S + 0800h
16C + S
4 or 5 (@ 2M)
4 or 5 (@ 2M)
4 or 5 (@ 8 M)
4 or 5 (@ 8M)
16C + S + 0800h
8C + (S-16) + 0400h
8C + (S-16) + 0C00h
Table 5 - Memory Address Location Formulae for all modes of operation
C = channel number, S = stream number
2-160