MT91L60/61
Register Summary
Gain Control Register 1
Advance Information
ADDRESS = 00h WRITE/READ VERIFY
Power Reset Value
1000 0000
RxFG2 RxFG1 RxFG0
TxFG2 TxFG1 TxFG0
TxINC
3
RxINC
7
6
5
4
2
1
0
Receive Gain
Setting (dB)
Transmit Gain
Setting (dB)
RxFG
RxFG
RxFG
TxFG
TxFG
TxFG
0
2
1
0
2
1
(default) 0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
(default) 0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
-1
-2
-3
-4
-5
-6
-7
1
2
3
4
5
6
7
RxFG = Receive Filter Gain bit n
TxFG = Transmit Filter Gain bit n
n
n
RxINC: When high, the receive path nominal gain is set to 0 dB. When low, this gain is -6.0 dB.
TxINC: When high, the transmit path nominal gain is set to 15.3 dB. When low, this gain is 6.0 dB.
Gain Control Register 2
ADDRESS = 01h WRITE/READ VERIFY
Power Reset Value
XXXX X000
-
-
-
-
-
STG2 STG1 STG0
7
6
5
4
3
2
1
0
Side-tone Gain
Setting (dB)
STG
STG
STG
0
2
1
(default) OFF
-9.96
-6.64
-3.32
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
3.32
6.64
9.96
STG = Side-tone Gain bit n
n
Note: Bits marked "-" are reserved bits and should be written with logic "0"
14
MITEL [ MITEL NETWORKS CORPORATION ]
