ISSUE 1.5 : April 2001
SYS88000RKX-85/10/12
AC OPERATING CONDITIONS
Read Cycle
-85
-10
-12
Parameter
Symbol
min max min max min max Unit
Read Cycle Time
tRC
85
-
-
85
85
50
-
100
-
100
100
55
-
120
-
120
120
60
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Access Time
tAA
-
-
-
-
Chip Select Access Time
tACS
tOE
-
Output Enable to Output Valid
Output Hold from Address Change
Chip Selection to Output in Low Z
Output Enable to Output in Low Z
Chip Deselection to O/P in High Z
Output Disable to Output in High Z
-
-
-
tOH
11.5
1.5
1.5
0
11.5
1.5
1.5
0
11.5
1.5
1.5
0
tCLZ
tOLZ
tCHZ
tOHZ
-
-
-
-
-
-
5
5
5
0
5
0
5
0
5
Write Cycle
-85
-10
-12
Parameter
Symbol
min max min max min max Unit
Write Cycle Time
tWC
tCW
tAW
tAS
85
75
75
0
-
-
100
80
80
0
-
-
120
100
100
0
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip Selection to End of Write
Address Valid to End of Write
Address Setup Time
-
-
-
-
-
-
Write Pulse Width
tWP
tWR
*** tWHZ
tDW
60
5
-
70
5
-
70
5
-
Write Recovery Time
-
-
-
Write to Output in High Z
Data to Write Time Overlap
Data Hold from Write Time
0
35
-
0
40
-
0
40
-
40
0
45
0
45
0
tDH
-
-
-
Output active from end of write *** tOW
5
-
5
-
5
-
*** Theses signals are the internal Ram signals on the module and are included to assist control signal
timing.
4
MOSAIC [ MOSAIC ]
