MOSEL VITELIC INC.
Preliminary
MSU3022/U3032/U3042
Instruction Set Summary
Syntax
1
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10
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40
ADC
ADC
ADCS
ADCS
ADD
ADD
ADDS
ADDS
ADL
ADL
ADLS
ADLS
AND
AND
ANDS
ANDS
CALL
CLRM
CLRS
HALT
IN
IN
IN
IN
INM
INM
JC
JMP
JNC
JNZ
JPK
JZ
LCD
LCDB
LCDP
MOV
MOV
MOV
MOV
MOV
A, Rm
Wn, d
A, Rm
Wn, d
A, Rm
Wn, d
A, Rm
Wn, d
A, Rm
Wn, d
A, Rm
Wn, d
A, Rm
Wn, d
A, Rm
Wn, d
d10
d7
d9
Rm, PA
Rm, PB
Rm, PS
Rm, PM
Rm, PA
Rm, PB
d10
d10
d10
d10
d10
d10
Lx, Rm
Lx, Rm
Lx, Rm
HI, d8
PH, d5
Rm, SR2
Rm, SR1
A, Rm
Description
Addition with Carry
"
ADC and store
"
addition
"
ADD and store
"
addition logical
"
ADL and store
"
move the AND result to Accumulator
"
AND and store
"
call the subroutine at address d10
turn the LGT and clear modes
clear setting
halt the processor
input to Rm from port A
input to Rm from port B
input to Rm from port S
input to Rm from port M
input to Rm from port g
"
jump if Carry set
jump absolute
jump if non-Carry
jump if non-zero
jump on bit k value
jump if zero
write number to LCD w/zero
write number to LCD w/blank
write pattern to LCD
move data to HIB
move data to port halt interrupt release byte
move ESR to register Rm
"
move data to Accumulator from Rm
Specifications subject to change without notice, contact your sales representatives for the most recent information.
7/16
PID 262(*) 08/97
MOSEL [ MOSEL VITELIC, CORP ]
