V54C316162VC
AC Characteristics (1,2,3)
T = 0 to 70°C; V = 0 V; V = 3.3 V ± 0.3 V, t = 1 ns
A
SS
CC
T
Limit Values
-55
-5
-6
-7
#
Symbol Parameter
Min.
Max.
Min. Max.
Min.
Max.
Min.
Max.
Unit
Clock and Clock Enable
tCK
tCK
tAC
Clock Cycle Time
CAS Latency = 3
CAS Latency = 2
5
–
–
5.5
10
–
–
6
–
–
7
–
–
ns
ns
10
10
10
Clock Frequency
CAS Latency = 3
CAS Latency = 2
–
–
200
100
–
–
183
100
–
–
166
100
–
–
143
100
MHz
MHz
Access Time from Clock
CAS Latency = 3
–
–
5
7
–
–
5.3
7
–
–
5.5
7
–
–
5.5
7
ns
ns
2
3
CAS Latency = 2
tCH
tCL
tT
Clock High Pulse Width
Clock Low Pulse Width
Transition time
2.5
2.5
1
–
–
2.5
2.5
1
–
–
2.5
2.5
1
–
–
2.5
2.5
1
–
–
ns
ns
ns
10
10
10
10
Setup and Hold Times
tCMDS Command Setup Time
2
2
2
2
1
1
1
1
–
–
–
–
–
–
–
–
2
2
2
2
1
1
1
1
–
–
–
–
–
–
–
–
2
2
2
2
1
1
1
1
–
–
–
–
–
–
–
–
2
2
2
2
1
1
1
1
–
–
–
–
–
–
–
–
ns
ns
ns
ns
ns
ns
ns
ns
4
4
4
4
4
4
4
4
tAS
Address Setup Time
Data In Setup Time
CKE Setup Time
tDS
tCKS
tCMDH
tAH
Command Hold Time
Address Hold Time
Data In Hold Time
CKE Hold Time
tDH
tCKH
Common Parameters
tRCD
tRAS
tRC
Row to Column Delay Time
15
40
60
15
10
–
16.5
45
–
18
48
66
18
12
–
18
48
70
21
14
–
ns
ns
ns
ns
ns
5
5
5
5
5
Row Active Time
Row Cycle Time
100K
100K
100K
100K
–
–
–
63
–
–
–
–
–
–
–
–
–
tRP
Row Precharge Time
17
tRRD
Activate(a) to Activate(b) Com-
11
mand
period
tCCD
CAS(a) to CAS(b) Command pe-
riod
1
–
1
–
1
–
1
–
CLK
tRCS
tSB
Mode Register Set-up time
10
0
–
5
–
11
0
–
5.5
–
12
0
–
6
–
14
0
–
7
–
ns
ns
ns
Power Down Mode Entry Time
tCDL
Last data in to new column ad-
dress delay
5
5.5
6
7
V54C316162VC Rev. 1.4 December 2001
10
MOSEL [ MOSEL VITELIC, CORP ]
