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V54C316162VC-6 参数 Datasheet PDF下载

V54C316162VC-6图片预览
型号: V54C316162VC-6
PDF下载: 下载PDF文件 查看货源
内容描述: 200/183/166/143 MHz的3.3伏, 2K刷新超高性能1M ×16 SDRAM 2组X达512Kbit ×16 [200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16]
分类和应用: 动态存储器
文件页数/大小: 22 页 / 322 K
品牌: MOSEL [ MOSEL VITELIC, CORP ]
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V54C316162VC  
Notes for AC Parameters:  
1.For proper power-up see the operation section of this data sheet.  
2.AC timing tests have V = 0.8V and V = 2.0V with the timing referenced to the 1.4 V crossover point. The transition  
IL  
IH  
time is measured between V and V . All AC measurements assume t = 1ns with the AC output load circuit shown  
IH  
IL  
T
in Figure 1  
tCK  
VIH  
VIL  
CLK  
+ 1.4 V  
t
T
tCS  
tCH  
50 Ohm  
1.4V  
COMMAND  
Z=50 Ohm  
I/O  
tAC  
tAC  
tLZ  
50 pF  
tOH  
1.4V  
OUTPUT  
tHZ  
Figure 1.  
3.If clock rising time is longer than 1 ns, a time (t /2 0.5) ns has to be added to this parameter.  
T
4.If t is longer than 1 ns, a time (t 1) ns has to be added to this parameter.  
T
T
5.These parameter account for the number of clock cycle and depend on the operating frequency of the clock, as  
follows:  
the number of clock cycle = specified value of timing period (counted in fractions as a whole number)  
6.Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after CKE returns high.  
Self Refresh Exit is not complete until a time period equal to tRC is satisfied once the Self Refresh Exit command  
is registered.  
V54C316162VC Rev. 1.4 December 2001  
12