MC34023 MC33023
Undervoltage Lockout
current feedback loop. It has been shown that the instability is
caused by a double pole at half the switching frequency. If an
external ramp (S ) is added to the on–time ramp (S ) of the
current–sense waveform, stability can be achieved.
One must be careful not to add too much ramp
compensation. If too much is added the system will start to
perform like a voltage mode regulator. All benefits of current
mode control will be lost. Figure 25 is an example of one way
in which external ramp compensation can be implemented.
There are two undervoltage lockout circuits within the IC.
The first senses V
and the second V . During power–up,
e
n
CC
ref
V
must exceed 9.2 V and V must exceed 4.2 V before
ref
CC
the outputs can be enabled and the Soft–Start latch released.
If V falls below 8.4 V or V falls below 3.6 V, the outputs
CC
ref
are disabled and the Soft–Start latch is activated. When the
UVLO is active, the part is in a low current standby mode
allowing the IC to have an off–line bootstrap start–up circuit.
Typical start–up current is 500 µA.
Figure 20. Ramp Compensation
Output
The MC34023 has a high current totem pole output
specifically designed for direct drive of power MOSFETs. It is
capable of up to ± 2.0 A peak drive current with a typical rise
and fall time of 30 ns driving a 1.0 nF load.
Ramp Compensation
Ramp Input
1.25 V
Separate pins for V and Power Ground are provided.
Ramp
Compensation S
C
With proper implementation, a significant reduction of
switching transient noise imposed on the control circuitry is
e
possible. The separate V supply input also allows the
designer added flexibility in tailoring the drive voltage
C
Current
Signal S
n
independent of V
.
CC
A simple equation can be used to calculate the amount of
external ramp slope necessary to add that will achieve
stability in the current loop. For the following equations, the
calculated values for the application circuit in Figure 34 are
also shown.
Reference
A 5.1 V bandgap reference is pinned out and is trimmed to
an initial accuracy of ±1.0% at 25°C. This reference has short
circuit protection and can source in excess of 10 mA for
powering additional control system circuitry.
Design Considerations
V
N
N
O
L
S
P
Do not attempt to construct the converter on
wire–wrap or plug–in prototype boards. With high
frequency, high power, switching power supplies it is
imperative to have separate current loops for the signal paths
and for the power paths. The printed circuit layout should
contain a ground plane with low current signal and high
current switch and output grounds returning on separate
paths back to the input filter capacitor. Shown in Figure 35 is
a printed circuit layout of the application circuit. Note how the
power and ground traces are run. All bypass capacitors and
snubbers should be connected as close as possible to the
specific part in question. The PC board lead lengths must be
less than 0.5 inches for effective bypassing for snubbing.
S
(R )Ai
S
e
where:
V
= DC output voltage
N , N = number of power transformer primary
O
S
P
= or secondary turns
A = gain of the current sense network
= (see Figures 23 and 24)
L = output inductor
= current sense resistance
i
R
S
5
2
8
(
)( )
0.3 0.55
S
For the application circuit:
e
Instabilities
1.8 µ
In current mode control, an instability can be encountered
at any given duty cycle. The instability is caused by the
= 0.115 V/ms
9
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