D.4.6 SCSR
— SCI Status Register
15
NOT USED
RESET:
1
1
0
0
0
0
0
9
8
TDRE
7
TC
6
RDRF
5
RAF
4
IDLE
3
OR
2
NF
$YFFC0C
1
FE
0
PF
0
0
SCSR contains flags that show SCI operating conditions. These flags are cleared ei-
ther by SCI hardware or by a CPU32 read/write sequence. The sequence consists of
reading SCSR, then reading or writing SCDR.
If an internal SCI signal for setting a status bit comes after the CPU32 has read the
asserted status bits, but before the CPU has written or read SCDR, the newly set sta-
tus bit is not cleared. SCSR must be read again with the bit set and SCDR must be
written or read before the status bit is cleared.
A long-word read can consecutively access both SCSR and SCDR. This action clears
receive status flag bits that were set at the time of the read, but does not clear TDRE
or TC flags. Reading either byte of SCSR causes all 16 bits to be accessed, and any
status bit already set in either byte are cleared on a subsequent read or write of regis-
ter SCDR.
TDRE — Transmit Data Register Empty
0 = Register TDR still contains data to be sent to the transmit serial shifter.
1 = A new character can now be written to register TDR.
TC — Transmit Complete
0 = SCI transmitter is busy.
1 = SCI transmitter is idle.
RDRF — Receive Data Register Full
0 = Register RDR is empty or contains previously read data.
1 = Register RDR contains new data.
RAF — Receiver Active
0 = SCI receiver is idle.
1 = SCI receiver is busy.
IDLE — Idle-Line Detected
0 = SCI receiver did not detect an idle-line condition.
1 = SCI receiver detected an idle-line condition.
OR — Overrun Error
0 = RDRF is cleared before new data arrives.
1 = RDRF is not cleared before new data arrives.
NF — Noise Error Flag
0 = No noise detected on the received data
1 = Noise occurred on the received data.
D
MC68331
USER’S MANUAL
REGISTER SUMMARY
MOTOROLA
D-29
MOTOROLA [ MOTOROLA, INC ]
