SM5006 series
PAD LAYOUT
(Unit:
µ
m)
PINOUT
(Top view)
VDD
Q
(920,1310)
Y
(0,0) INHN XT XTN VSS
X
Chip size: 0.92
×
1.31mm
Chip thickness: 300 ± 30µm
Chip base: V
DD
level
PIN DESCRIPTION and PAD DIMENSIONS
Number
1
2
3
4
5
6
7
8
Name
INHN
XT
XTN
VSS
Q
NC
NC
VDD
I/O
I
I
O
–
O
–
–
–
Description
Output state control input. High impedance when LOW. Pull-up resistor built in
Amplifier input.
Amplifier output.
Ground
Output. Output frequency (f
O
)
No connection
No connection
Supply voltage
Crystal oscillator connection pins.
Crystal oscillator connected between XT and XTN
Pad dimensions [µm]
X
195
385
575
766
765
–
–
162
Y
212
212
212
212
1152
–
–
1152
BLOCK DIAGRAM
VDD VSS
XTN
R
G
C
G
R
f
R
D
C
D
XT
INHN
HA5006
INHN
XT
XTN
VSS
1
2
3
4
8
7
6
5
VDD
NC
NC
Q
Q
SEIKO NPC CORPORATION —3