WF5027 series
PAD LAYOUT
(Unit:
µ
m)
I
5027A
×
, M
×
, Q
×
(for Flip Chip Bonding)
(750,690)
VSS
5
6
1
(0,0)
XT
X
2
XTN
4
3
Q
VDD
I
5027B
×
, N
×
, R
×
(for Wire Bonding (type I))
(750,690)
Q
5
6
1
(0,0)
XTN
X
2
XT
4
3
VSS
INHN
I
5027C
×
, P
×
, S
×
(for Wire Bonding (type II))
(750,690)
VDD
5
6
1
(0,0)
XT
X
2
XTN
4
3
Q
VSS
Y INHN
Y
VDD
Y INHN
Chip size: 0.75
×
0.69mm
Chip thickness: 130 ± 15µm
PAD size: 90µm
Chip base: V
SS
level
Chip size: 0.75
×
0.69mm
Chip thickness: 130 ± 15µm
PAD size: 90µm
Chip base: V
SS
level
Chip size: 0.75
×
0.69mm
Chip thickness: 130 ± 15µm
PAD size: 90µm
Chip base: V
SS
level
PAD DIMENSIONS
Pad dimensions [µm]
Pad No.
X
1
2
3
4
5
6
229
520
636
636
114
114
Y
114
114
304
531
531
304
PIN DESCRIPTION
Pad No.
5027A
×
5027B
×
5027C
×
5027M
×
5027N
×
5027P
×
5027Q
×
5027R
×
5027S
×
1
2
3
4
5
6
2
1
6
5
4
3
1
2
5
4
3
6
Pin
Name
Description
XT
XTN
VDD
Q
VSS
INHN
Amplifier input
Amplifier output
(+) supply voltage
Output
(–) ground
Output state
control input
Crystal connection pins. Crystal is connected
between XT and XTN.
–
Output frequency determined by internal circuit
to one of f
O
, f
O
/2, f
O
/4, f
O
/8, f
O
/16, f
O
/32, f
O
/64
–
High impedance when LOW (oscillator stops).
Power-saving pull-up resistor built-in.
BLOCK DIAGRAM
VDD VSS
INHN
VRG
R
F
DIVIDER
CMOS
Q
XT
R
D
C
G
C
D
XTN
SEIKO NPC CORPORATION —3
NPC [ NIPPON PRECISION CIRCUITS INC ]
