LM1117/LM1117I
Application Note
(Continued)
The next parameter which must be calculated is the maxi-
mum allowable temperature rise, T
R
(max):
T
R
(max) = T
J
(max)-T
A
(max)
where T
J
(max) is the maximum allowable junction tempera-
ture (125˚C), and T
A
(max) is the maximum ambient tem-
perature which will be encountered in the application.
Using the calculated values for T
R
(max) and P
D
, the maxi-
mum allowable value for the junction-to-ambient thermal
resistance (θ
JA
) can be calculated:
θ
JA
= T
R
(max)/P
D
10091937
FIGURE 5. Cross-sectional view of Integrated Circuit
Mounted on a printed circuit board. Note that the case
temperature is measured at the point where the leads
contact with the mounting pad surface
The LM1117 regulators have internal thermal shutdown to
protect the device from over-heating. Under all possible
operating conditions, the junction temperature of the LM1117
must be within the range of 0˚C to 125˚C. A heatsink may be
required depending on the maximum power dissipation and
maximum ambient temperature of the application. To deter-
mine if a heatsink is needed, the power dissipated by the
regulator, P
D
, must be calculated:
I
IN
= I
L
+ I
G
P
D
= (V
IN
-V
OUT
)I
L
+ V
IN
I
G
shows the voltages and currents which are present
in the circuit.
If the maximum allowable value for
θ
JA
is found to be
≥136˚C/W
for SOT-223 package or
≥79˚C/W
for TO-220
package or
≥92˚C/W
for TO-252 package, no heatsink is
needed since the package alone will dissipate enough heat
to satisfy these requirements. If the calculated value for
θ
JA
falls below these limits, a heatsink is required.
As a design aid,
shows the value of the
θ
JA
of
SOT-223 and TO-252 for different heatsink area. The copper
patterns that we used to measure these
θ
JA
s are shown at
the end of the Application Notes Section.
and
reflects the same test results as what are in the
and
shows the maximum allowable power
dissipation vs. ambient temperature for the SOT-223 and
TO-252 device. Figures
and
shows the
maximum allowable power dissipation vs. copper area (in
2
)
for the SOT-223 and TO-252 devices. Please see AN1028
for power enhancement techniques to be used with SOT-223
and TO-252 packages.
*Application Note AN-1187 discusses improved thermal per-
formance and power dissipation for the LLP.
10091916
FIGURE 6. Power Dissipation Diagram
TABLE 1.
θ
JA
Different Heatsink Area
Layout
1
2
3
4
5
6
7
8
9
10
11
12
13
0.0123
0.066
0.3
0.53
0.76
1
0
0
0
0
0
0.066
0.175
Copper Area
Top Side (in
2
)*
Bottom Side (in
2
)
0
0
0
0
0
0
0.2
0.4
0.6
0.8
1
0.066
0.175
11
Thermal Resistance
(θ
JA
,˚C/W) SOT-223
136
123
84
75
69
66
115
98
89
82
79
125
93
(θ
JA
,˚C/W) TO-252
103
87
60
54
52
47
84
70
63
57
57
89
72
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