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LM75CIMM-5 参数 Datasheet PDF下载

LM75CIMM-5图片预览
型号: LM75CIMM-5
PDF下载: 下载PDF文件 查看货源
内容描述: 数字温度传感器和热看门狗具有双线接口 [Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface]
分类和应用: 传感器换能器温度传感器输出元件
文件页数/大小: 18 页 / 734 K
品牌: NSC [ NATIONAL SEMICONDUCTOR ]
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LM75
1.0 Functional Description
1.4 TEMPERATURE DATA FORMAT
(Continued)
Temperature data can be read from the Temperature, T
OS
Set Point, and T
HYST
Set Point registers; and written to the
T
OS
Set Point, and T
HYST
Set Point registers. Temperature
data is represented by a 9-bit, two’s complement word with
an LSB (Least Significant Bit) equal to 0.5˚C:
Temperature
+125˚C
+25˚C
+0.5˚C
0˚C
−0.5˚C
−25˚C
−55˚C
Digital Output
Binary
0 1111 1010
0 0011 0010
0 0000 0001
0 0000 0000
1 1111 1111
1 1100 1110
1 1001 0010
Hex
0FAh
032h
001h
000h
1FFh
1CEh
192h
1.7 COMPARATOR/INTERRUPT MODE
As indicated in the O.S. Output Temperature Response Dia-
gram,
the events that trigger O.S. are identical for
either Comparator or Interrupt mode. The most important
difference is that in Interrupt mode the O.S. will remain set
indefinitely once it has been set. To reset O.S. while in
Interrupt mode, perform a read from any register in the
LM75.
1.8 O.S. OUTPUT
The O.S. output is an open-drain output and does not have
an internal pull-up. A “high” level will not be observed on this
pin until pull-up current is provided from some external
source, typically a pull-up resistor. Choice of resistor value
depends on many system factors but, in general, the pull-up
resistor should be as large as possible. This will minimize
any errors due to internal heating of the LM75. The maxi-
mum resistance of the pull up, based on LM75 specification
for High Level Output Current, to provide a 2V high level, is
30 kΩ.
1.9 O.S. POLARITY
The O.S. output can be programmed via the configuration
register to be either active low (default mode), or active high.
In active low mode the O.S. output goes low when triggered
exactly as shown on the O.S. Output Temperature Response
Diagram,
Active high simply inverts the polarity of
the O.S. output.
1.5 SHUTDOWN MODE
Shutdown mode is enabled by setting the shutdown bit in the
Configuration register via the I
2
C bus. Shutdown mode re-
duces power supply current to 4 µA typical. In Interrupt mode
O.S. is reset if previously set and is undefined in Comparator
mode during shutdown. The I
2
C interface remains active.
Activity on the clock and data lines of the I
2
C bus may
slightly increase shutdown mode quiescent current. T
OS
,
T
HYST
, and Configuration registers can be read from and
written to in shutdown mode.
1.6 FAULT QUEUE
A fault queue of up to 6 faults is provided to prevent false
tripping of O.S. when the LM75 is used in noisy environ-
ments. The number of faults set in the queue must occur
consecutively to set the O.S. output.
9
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