LM75
Logic Electrical Characteristics
(Continued)
DIGITAL DC CHARACTERISTICS
Unless otherwise noted, these specifications apply for +V
S
= +5 Vdc for LM75BIM-5,
LM75BIMM-5, LM75CIM-5, and LM75CIMM-5 and +V
S
= +3.3 Vdc for LM75BIM-3, LM75BIMM-3, LM75CIM-3, and
LM75CIMM-3 (Note 6).
Boldface limits apply for T
A
= T
J
= T
MIN
to T
MAX
;
all other limits T
A
= T
J
= +25˚C, unless otherwise
noted.
Parameter
Output Fall Time
Conditions
C
L
= 400 pF
Typical
Limits
250
Units
(Limit)
ns (max)
Symbol
t
OF
2
I
O
= 3 mA
I C DIGITAL SWITCHING CHARACTERISTICS
Unless otherwise noted, these specifications apply for +V
S
= +5 Vdc for
LM75BIM-5, LM75BIMM-5, LM75CIM-5, and LM75CIMM-5 and +V
S
= +3.3 Vdc for LM75BIM-3, LM75BIMM-3, LM75CIM-3,
and LM75CIMM-3. C
L
(load capacitance) on output lines = 80 pF unless otherwise specified.
Boldface limits apply for T
A
=
T
J
= T
MIN
to T
MAX
;
all other limits T
A
= T
J
= +25˚C, unless otherwise noted. The switching characteristics of the LM75 fully
meet or exceed the published specifications of the I
2
C bus. The following parameters are the timing relationships between SCL
and SDA signals related to the LM75. They are not the I
2
C bus specifications.
Symbol
t
1
t
2
t
3
t
4
t
5
t
TIMEOUT
SCL (Clock) Period
Data in Set-Up Time to SCL High
Data Out Stable after SCL Low
SDA Low Set-Up Time to SCL Low (Start Condition)
SDA High Hold Time after SCL High (Stop Condition)
SDA Time Low for Reset of Serial Interface (Note 13)
LM75B
LM75C
Parameter
Conditions
Typical
Limits
2.5
100
0
100
100
75
325
Not
Applicable
Units
(Limit)
µs (min)
ns (min)
ns (min)
ns (min)
ns (min)
ms (min)
ms (max)
01265804
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its rated operating conditions.
Note 2:
When the input voltage (V
I
) at any pin exceeds the power supplies (V
I
<
GND or V
I
>
+V
S
) the current at that pin should be limited to 5 mA. The 20 mA
maximum package input current rating limits the number of pins that can safely exceedthe power supplies with an input current of 5 mA to four.
Note 3:
See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” or the section titled “Surface Mount” found in a current National
Semiconductor Linear Data Book for other methods of soldering surface mount devices.
Note 4:
Human body model, 100 pF discharged through a 1.5 kΩ resistor. Machine model, 200 pF discharged directly into each pin.
Note 5:
LM75
θ
JA
(thermal resistance, junction-to-ambient) when attached to a printed circuit board with 2 oz. foil similar to the one shown in
is summarized
in the table below:
Device Number
LM75BIM-3, LM75BIM-5, LM75CIM-3, LM75CIM-5
LM75BIMM-3, LM75BIMM-5, LM75CIMM-3, LM75CIMM-5
NS Package
Number
M08A
MUA08A
Thermal
Resistance (θ
JA
)
200˚C/W
250˚C/W
Note 6:
All part numbers of the LM75 will operate properly over the +V
S
supply voltage range of 3V to 5.5V. The devices are tested and specified for rated accuracy
at their nominal supply voltage. Accuracy will typically degrade 1˚C/V of variation in +V
S
as it varies from the nominal value.
Note 7:
Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
5
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