M29W160ET, M29W160EB
Note that the Program command cannot change a
bit set to ’0’ back to ’1’ and attempting to do so will
set DQ5 to ‘1’. A Bus Read operation to that ad-
dress will show the bit is still ‘0’. One of the Erase
commands must be used to set all the bits in a
block or in the whole memory from ’0’ to ’1’
Erase Timer Bit (DQ3).
The Erase Timer Bit can
be used to identify the start of Program/Erase
Controller operation during a Block Erase com-
mand. Once the Program/Erase Controller starts
erasing the Erase Timer Bit is set to ’1’. Before the
Program/Erase Controller starts the Erase Timer
Bit is set to ’0’ and additional blocks to be erased
may be written to the Command Interface. The
Erase Timer Bit is output on DQ3 when the Status
Register is read.
Alternative Toggle Bit (DQ2).
The Alternative
Toggle Bit can be used to monitor the Program/
Erase controller during Erase operations. The Al-
ternative Toggle Bit is output on DQ2 when the
Status Register is read.
During Chip Erase and Block Erase operations the
Toggle Bit changes from ’0’ to ’1’ to ’0’, etc., with
successive Bus Read operations from addresses
within the blocks being erased. A protected block
is treated the same as a block not being erased.
Once the operation completes the memory returns
to Read mode.
During Erase Suspend the Alternative Toggle Bit
changes from ’0’ to ’1’ to ’0’, etc. with successive
Bus Read operations from addresses within the
blocks being erased. Bus Read operations to ad-
dresses within blocks not being erased will output
the memory cell data as if in Read mode.
After an Erase operation that causes the Error Bit
to be set the Alternative Toggle Bit can be used to
identify which block or blocks have caused the er-
ror. The Alternative Toggle Bit changes from ’0’ to
’1’ to ’0’, etc. with successive Bus Read Opera-
tions from addresses within blocks that have not
erased correctly. The Alternative Toggle Bit does
not change if the addressed block has erased cor-
rectly.
Table 7. Status Register Bits
Operation
Program
Program During Erase
Suspend
Program Error
Chip Erase
Block Erase before
timeout
Block Erase
Non-Erasing Block
Erasing Block
Erase Suspend
Non-Erasing Block
Good Block Address
Erase Error
Faulty Block Address
Note: Unspecified data bits should be ignored.
Address
Any Address
Any Address
Any Address
Any Address
Erasing Block
Non-Erasing Block
Erasing Block
DQ7
DQ7
DQ7
DQ7
0
0
0
0
0
1
DQ6
Toggle
Toggle
Toggle
Toggle
Toggle
Toggle
Toggle
Toggle
No Toggle
DQ5
0
0
1
0
0
0
0
0
0
DQ3
–
–
–
1
0
0
1
1
–
DQ2
–
–
–
Toggle
Toggle
No Toggle
Toggle
No Toggle
Toggle
RB
0
0
0
0
0
0
0
0
1
1
Data read as normal
0
0
Toggle
Toggle
1
1
1
1
No Toggle
Toggle
0
0
18/40
NUMONYX [ NUMONYX B.V ]
