M29W320DT, M29W320DB
Signal descriptions
2.7
Write Enable (W)
The Write Enable, W, controls the Bus Write operation of the memory’s Command Interface.
2.8
V
PP/
Write Protect (V
PP
/WP)
The V
PP
/Write Protect pin provides two functions. The V
PP
function allows the memory to
use an external high voltage power supply to reduce the time required for Unlock Bypass
Program operations. The Write Protect function provides a hardware method of protecting
the 16 Kbyte Boot Block. The V
PP
/Write Protect pin must not be left floating or unconnected.
When V
PP
/Write Protect is Low, V
IL
, the memory protects the 16 Kbyte Boot Block; Program
and Erase operations in this block are ignored while V
PP
/Write Protect is Low.
When V
PP
/Write Protect is High, V
IH
, the memory reverts to the previous protection status
of the 16 Kbyte boot block. Program and Erase operations can now modify the data in the 16
Kbyte Boot Block unless the block is protected using Block Protection.
When V
PP
/Write Protect is raised to V
PP
the memory automatically enters the Unlock
Bypass mode. When V
PP
/Write Protect returns to V
IH
or V
IL
normal operation resumes.
During Unlock Bypass Program operations the memory draws I
PP
from the pin to supply the
programming circuits. See the description of the Unlock Bypass command in the Command
Interface section. The transitions from V
IH
to V
PP
and from V
PP
to V
IH
must be slower than
t
VHVPP
, see
Never raise V
PP
/Write Protect to V
PP
from any mode except Read mode, otherwise the
memory may be left in an indeterminate state.
A 0.1µF capacitor should be connected between the V
PP
/Write Protect pin and the V
SS
Ground pin to decouple the current surges from the power supply. The PCB track widths
must be sufficient to carry the currents required during Unlock Bypass Program, I
PP
.
2.9
Reset/Block Temporary Unprotect (RP)
The Reset/Block Temporary Unprotect pin can be used to apply a Hardware Reset to the
memory or to temporarily unprotect all Blocks that have been protected.
Note that if V
PP
/WP is at V
IL
, then the 16 KByte outermost boot block will remain protect
even if RP is at V
ID
.
A Hardware Reset is achieved by holding Reset/Block Temporary Unprotect Low, V
IL
, for at
least t
PLPX
. After Reset/Block Temporary Unprotect goes High, V
IH
, the memory will be
ready for Bus Read and Bus Write operations after t
PHEL
or t
RHEL
, whichever occurs last.
See the Ready/Busy Output section,
and
for more details.
Holding RP at V
ID
will temporarily unprotect the protected Blocks in the memory. Program
and Erase operations on all blocks will be possible. The transition from V
IH
to V
ID
must be
slower than t
PHPHH
.
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NUMONYX [ NUMONYX B.V ]
