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M45PE40-VMN6P 参数 Datasheet PDF下载

M45PE40-VMN6P图片预览
型号: M45PE40-VMN6P
PDF下载: 下载PDF文件 查看货源
内容描述: 4兆位,低电压,页面可擦除串行闪存与字节变性和50兆赫的SPI总线接口 [4 Mbit, low voltage, Page-Erasable Serial Flash memory with byte-alterability and a 50 MHz SPI bus interface]
分类和应用: 闪存存储内存集成电路光电二极管时钟
文件页数/大小: 46 页 / 888 K
品牌: NUMONYX [ NUMONYX B.V ]
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Instructions
M45PE40
6.12
Release from Deep Power-down (RDP)
Once the device has entered the Deep Power-down mode, all instructions are ignored
except the Release from Deep Power-down (RDP) instruction. Executing this instruction
takes the device out of the Deep Power-down mode.
The Release from Deep Power-down (RDP) instruction is entered by driving Chip Select (S)
Low, followed by the instruction code on Serial Data Input (D). Chip Select (S) must be
driven Low for the entire duration of the sequence.
The instruction sequence is shown in
The Release from Deep Power-down (RDP) instruction is terminated by driving Chip Select
(S) High. Sending additional clock cycles on Serial Clock (C), while Chip Select (S) is driven
Low, cause the instruction to be rejected, and not executed.
After Chip Select (S) has been driven High, followed by a delay, t
RDP
, the device is put in the
Standby Power mode. Chip Select (S) must remain High at least until this period is over. The
device waits to be selected, so that it can receive, decode and execute instructions.
Any Release from Deep Power-down (RDP) instruction, while an Erase, Program or Write
cycle is in progress, is rejected without having any effects on the cycle that is in progress.
Figure 17. Release from Deep Power-down (RDP) instruction sequence
S
0
C
Instruction
D
1
2
3
4
5
6
7
t
RDP
High Impedance
Q
Deep Power-down Mode
Standby Mode
AI06807
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