M58LT256JST, M58LT256JSB
Description
The device includes 17 Protection Registers and 2 Protection Register locks, one for the first
Protection Register and the other for the 16 OTP (one-time-programmable) Protection
Registers of 128 bits each. The first Protection Register is divided into two segments: a 64
bit segment containing a unique device number written by Numonyx, and a 64 bit segment
OTP by the user. The user programmable segment can be permanently protected.
shows the Protection Register Memory map.
The M58LT256JST/B also has a full set of software security features that are not described
in this datasheet, but are documented in a dedicated application note. For further
information please contact Numonyx.
The M58LT256JST/B are offered in a TBGA64, 10 × 13 mm, 1 mm pitch package, and are
supplied with all the bits erased (set to ’1’).
Figure 1.
Logic diagram
VDD VDDQ VPP
16
A0-A23
W
E
G
RP
L
K
M58LT256JST
M58LT256JSB
WAIT
DQ0-DQ15
VSS
VSSQ
AI13299
9/108
NUMONYX [ NUMONYX B.V ]
