DC and AC parameters
N25Q128 - 1.8 V
Table 33. AC Characteristics (page 2 of 2)
Symbol
Alt.
Parameter
Min
Typ(2)
Max
Unit
Enhanced program supply voltage High
(VPPH) to Chip Select Low for Single and 200
Dual I/O Page Program
ns
tVPPHSL(6)
tW
Write status register cycle time
1.3
40
8
ms
ns
s
tCFSR
Clear flag status register cycle time
Write non volatile configuration register
cycle time
tWNVCR
tWVCR
0.2
40
40
3
Write volatile configuration register cycle
time
ns
ns
Write volatile enhanced
configurationregister cycle time
tWRVECR
tPP(7)
int(n/8) ×
0.015(8)
ms
Page program cycle time (n bytes)
5
Program OTP cycle time (64 bytes)
Subsector erase cycle time
Sector erase cycle time
0.4
0.2
0.7
170
ms
s
tSSE
tSE
2
3
s
tBE
Bulk erase cycle time
250
s
1. tCH + tCL must be greater than or equal to 1/ fC.
2. Typical values given for TA = 25 °C
3. Value guaranteed by characterization, not 100% tested in production.
4. Expressed as a slew-rate.
5. Only applicable as a constraint for a WRSR instruction when SRWD is set to '1'.
6. VPPH should be kept at a valid level until the program or erase operation has completed and its result (success or failure)
is known. Avoid applying VPPH to the W/VPP pin during Bulk Erase.
7. When using the page program (PP) instruction to program consecutive bytes, optimized timings are obtained with one
sequence including all the bytes versus several sequences of only a few bytes (1 < n < 256).
8. int(A) corresponds to the upper integer part of A. For example int(12/8) = 2, int(32/8) = 4 int(15.3) =16.
Figure 108. Reset AC waveforms: program or erase cycle is in progress
S
tSHRH
tRHSL
tRLRH
Reset
AI06808
See Table 34.: Reset Conditions.
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NUMONYX [ NUMONYX B.V ]
