NAND02G-B2D
Device operations
The NAND02G-B2D device features automatic EDC (error detection code) during a copy
back operation. Consequently, external ECC is no longer required. The errors detected
during copy back operations can be read by performing a read EDC Status register
operation (see Section 6.13: Read EDC status register). See also Section 6.9 for details of
EDC operations.
The copy back program operation requires the following four steps:
1. The first step reads the source page. The operation copies all 2112 bytes from the
page into the data buffer. It requires:
–
–
–
1 bus write cycle to set up the command
5 bus write cycles to input the source page address
1 bus write cycle to issue the confirm command code
2. When the device returns to the ready state (Ready/Busy High), optional data readout is
allowed by pulsing R; the next bus write cycle of the command is given with the 5 bus
cycles to input the target page address. The address A18 in x 8 devices (A17 in x 16
devices) must be the same for the source and target page
3. Then, the confirm command is issued to start the P/E/R controller.
To see the data input cycle for modifying the source page and an example of the copy back
program operation, refer to Figure 13: Copy back program (without readout of data).
Figure 15: Page copy back program with random data input shows a data input cycle to
modify a portion or a multiple distant portion of the source page.
Figure 13. Copy back program (without readout of data)
Source
Add Inputs
Target
Add Inputs
I/O
10h
70h
SR0
35h
85h
00h
Read
Code
Copy Back
Code
Read Status Register
tBLBH1
tBLBH2
(Read Busy time)
(Program Busy time)
RB
Busy
Busy
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1. Copy back program is only permitted between odd address pages or even address pages.
Figure 14. Copy back program (with readout of data)
Source
Add Inputs
Target
Add Inputs
I/O
10h
70h
SR0
35h
85h
00h
Data Outputs
Read
Code
Copy Back
Code
Read Status
Register
tBLBH1
tBLBH2
(Read Busy time)
(Program Busy time)
RB
Busy
Busy
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