欢迎访问ic37.com |
会员登录 免费注册
发布采购

MSM518222A-40JS 参数 Datasheet PDF下载

MSM518222A-40JS图片预览
型号: MSM518222A-40JS
PDF下载: 下载PDF文件 查看货源
内容描述: 262214字×8位字段存储 [262,214-Word X 8-Bit Field Memory]
分类和应用: 存储
文件页数/大小: 17 页 / 190 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
 浏览型号MSM518222A-40JS的Datasheet PDF文件第6页浏览型号MSM518222A-40JS的Datasheet PDF文件第7页浏览型号MSM518222A-40JS的Datasheet PDF文件第8页浏览型号MSM518222A-40JS的Datasheet PDF文件第9页浏览型号MSM518222A-40JS的Datasheet PDF文件第11页浏览型号MSM518222A-40JS的Datasheet PDF文件第12页浏览型号MSM518222A-40JS的Datasheet PDF文件第13页浏览型号MSM518222A-40JS的Datasheet PDF文件第14页  
¡ Semiconductor
MSM518222A
Notes: 1. Input signal reference levels for the parameter measurement are V
IH
= 3.0 V and V
IL
= 0 V. The transition time t
T
is defined to be a transition time that signal transfers
between V
IH
= 3.0 V and V
IL
= 0 V.
2. AC measurements assume t
T
= 3 ns.
3. Read address must have more than a 600 address delay than write address in every
cycle when asynchronous read/write is performed.
4. Read must have more than a 600 address delay than write in order to read the data
written in a current series of write cycles which has been started at last write reset
cycle: this is called "new data read".
When read has less than a 70 address delay than write, the read data are the data
written in a previous series of write cycles which had been written before the last
write reset cycle: this is called "old data read".
5. When the read address delay is between more than 71 and less than 599, read data
will be undetermined. However, normal write is achieved in this address condition.
6. Outputs are measured with a load equivalent to 1 TTL load and 30 pF.
Output reference levels are V
OH
= 2.4 V and V
OL
= 0.8 V.
10/16