FEDD51V17805F-02
1
Semiconductor
MSM51V17805F
DC CHARACTERISTICS
(V
CC
= 3.3V
±
0.3V, Ta = 0 to 70°C)
MSM51V17805 MSM51V17805 MSM51V17805
F-50
F-60
F-70
Unit Note
Min.
Output High Voltage
Output Low Voltage
Input Leakage
Current
Output Leakage
Current
Average Power
Supply Current
(Operating)
Power Supply
Current
(Standby)
Average Power
Supply Current
(RAS-only Refresh)
Power Supply
Current
(Standby)
Average Power
Supply Current
(CAS before
RAS
Refresh)
Average Power
Supply Current
(Fast Page Mode)
V
OH
V
OL
I
OH
=
−2.0mA
I
OL
= 2.0mA
0V
≤
V
I
≤
V
CC
+0.3V;
I
LI
All other pins not
under test = 0V
DQ disable
0V
≤
V
O
≤
V
CC
RAS, CAS
cycling,
t
RC
= Min.
RAS, CAS
= V
IH
I
CC2
RAS, CAS
≥
V
CC
−
0.2V
RAS
cycling,
I
CC3
CAS
= V
IH
,
t
RC
= Min.
RAS
= V
IH
,
I
CC5
CAS
= V
IL
,
DQ = enable
RAS
= cycling,
CAS
before
RAS
RAS
= V
IL
,
I
CC7
CAS
cycling,
t
HPC
= Min.
100
90
80
mA
1,3
5
5
5
mA
1
100
90
80
mA
1,2
−
10
10
−
10
10
−
10
10
µA
2.4
0
Max.
V
CC
0.4
Min.
2.4
0
Max.
V
CC
0.4
Min.
2.4
0
Max.
V
CC
0.4
V
V
Parameter
Symbol
Condition
I
LO
−
10
10
−
10
10
−
10
10
µA
I
CC1
100
90
80
mA
1,2
2
0.5
2
0.5
2
mA
0.5
1
I
CC6
100
90
80
mA
1,2
Notes: 1. I
CC
Max. is specified as I
CC
for output open condition.
2. The address can be changed once or less while
RAS
= V
IL
.
3. The address can be changed once or less while
CAS
= V
IH
.
5/17
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