FEDL6722-05
MSM6722
OKI Semiconductor
Configuring SGC and SG pins
The internal equivalent circuit around the SGC and SG pins is shown below.
AVDD
MSM6722
50kW
(TYP)
+
–
SGC
To OP amplifier LPF
50kW
(TYP)
SG
AGND
20kW
(TYP)
AGND
Power-down signal
Switch is open
during power-down
mode
AGND
The SG signal is reference voltage (signal ground) for internal OP amplifiers and LPF.
Install a capacitor between the SGC pin and AGND and between the SG pin and AGND
respectively in order to make the SG signal noiseless. It is recommended to install an approx.
1m capacitor, which should be determined after evaluating the tone quality.
It takes several ten msec until the DC levels such as the SG level of the analog circuit is stabilized
after the power-down mode is cancelled. The larger capacitance of a capacitor connected to SGC
or SG requires the longer time for stabilizing.
After the power-down mode is cancelled, enter voices after the DC levels for the analog circuit
has been stabilized.
When the device is in power-down mode, the output voltage of the SG pin becomes unstable.
Therefore, SG must not be supplied to external circuits.
Otherwise, power suppluy current may be leaked via the internal SG circuit.
Same is true for the SGC pin.
13/21
OKI [ OKI ELECTRONIC COMPONETS ]
