MC1496, MC1496B
Bias currents flowing into Pins 1, 4, 8 and 10 are transistor
base currents and can normally be neglected if external bias
dividers are designed to carry 1.0 mA or more.
Transadmittance Bandwidth
Negative Supply
V
EE
should be dc only. The insertion of an RF choke in
series with V
EE
can enhance the stability of the internal
current sources.
Signal Port Stability
Carrier transadmittance bandwidth is the 3.0 dB bandwidth
of the device forward transadmittance as defined by:
i (each sideband)
+
o
g
21C
v s (signal)
Vo
+
0
Signal transadmittance bandwidth is the 3.0 dB bandwidth
of the device forward transadmittance as defined by:
i o (signal)
g
21S
+
v (signal)
s
Under certain values of driving source impedance,
oscillation may occur. In this event, an RC suppression
network should be connected directly to each input using
short leads. This will reduce the Q of the source−tuned
circuits that cause the oscillation.
Signal Input
(Pins 1 and 4)
Vc
+
0.5 Vdc, Vo
+
0
510
10 pF
Coupling and Bypass Capacitors
Capacitors C1 and C2 (Figure 5) should be selected for a
reactance of less than 5.0
W
at the carrier frequency.
Output Signal
The output signal is taken from Pins 6 and 12 either
balanced or single−ended. Figure 11 shows the output levels
of each of the two output sidebands resulting from variations
in both the carrier and modulating signal inputs with a
single−ended output connection.
An alternate method for low−frequency applications is to
insert a 1.0 kW resistor in series with the input (Pins 1, 4). In
this case input current drift may cause serious degradation
of carrier suppression.
TEST CIRCUITS
1.0 k
C1
0.1
mF
1.0 k
R
e
51
Carrier
Input
V
C
V
S
Modulating
Signal Input
C
2
0.1
mF
8
10
1
4
51
2
1.0 k
3
R
L
3.9 k
I9 I6
MC1496
14
I10
V
−
−8.0 Vdc
V
EE
I5
5
6.8 k
NOTE:
V
CC
12 Vdc
R
L
3.9 k
+V
o
−V
o
Z
in
0.5 V
8
+ − 10
1
4
2
R
e
= 1.0 k
3
MC1496
14
5
6.8 k
−8.0 Vdc
Shielding of input and output leads may be needed
to properly perform these tests.
6
12
+V
o
Z
out
−V
o
6
12
10 k
R1
10 k 51
50 k
Carrier Null
Figure 5. Carrier Rejection and Suppression
V
CC
12 Vdc
R
e
= 1.0 k
1.0 k
I7
I8
I1
I4
8
10
1
4
2
MC1496
14
I10
5
6.8 k
3
I6
6
12
I9
2.0 k
Carrier
Input 0.1
mF
V
C
V
S
Modulating
Signal Input
10 k
Figure 6. Input−Output Impedance
1.0 k
51
0.1
mF
8
10
1
4
10 k
50 k
Carrier Null
V
−
−8.0 Vdc
V
EE
51
51
1.0 k
R
e
2
1.0 k
3
6
12
14
5
6.8 k
V
CC
12 Vdc
2.0 k
50 50
0.01
mF
+V
o
−V
o
1.0 k
MC1496
−8.0 Vdc
V
EE
Figure 7. Bias and Offset Currents
Figure 8. Transconductance Bandwidth
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