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OLP&SCP
To protect the circuit from being damaged under the over load or short circuit condition, a smart OLP&SCP function is
implemented in the RS2051. When short circuit or over load occurs in the output end, the feedback cycle would enhance the
voltage of FB pin, while the voltage is over 4.2V or the current from FB is below 152uA, the internal detective circuit would send
a signal to shut down the GATE and pull down the VDD voltage, then the circuit is restart. To avoid the wrong operation when
circuit starts, the delay time is set. When the RI resistance is 100Kohm, the delay time TOLP&SCP is between 33mS and 50mS.
The relationship between RI and TOLP&SCP follows the below equation.
RI × 2
6×103
RI ×3
6×103
(mS) < TOLP&SCP
<
(mS)
Over Temperature Protection
The RS2051 has a built-in temperature sensing circuit to shut down PWM output once the junction temperature exceeds 130°C.
While PWM output is shut down, VDD voltage will gradually drop to the UVLO voltage, and VDD voltage will gradually increase
again. If the junction temperature is still higher than 130°C, the PWM controller will be shut down again. This situation will
continue until the temperature drops below 100°C. The PWM output will then be turned back. The temperature hysteresis
window for the OTP circuit is 30°C.
Sense Fault Detect
Changing the resistance of Sense pin could limit the maximal peak current of power MOSFET. If the Sense pin is short circuit to
the ground and the RS2051 is overload, the power MOSFET and transformer is easy to be shattered. So, the short circuit
protection is built in the RS2051. Every time to start up, the circuit would detect the voltage of the Sense pin when the start
signal is send. If the voltage keeps lower than 177mV, the circuit would be cut off and restart in 1.2mS. But, when the switch
power is cut off, there could always be a big noise on the ground, so to achieve this function, it is strongly suggested that the
board on the ground of the sense pin must be attention.
Anti Intermission Surge
When the power supplies change the heavy load to light load immediately, there could be tow phenomena caused by system
delay. They are output voltage overshot and intermission surge. To avoid it, the anti intermission surge is built in the RS2051. If
it occurs, the FB current is to increase rapidly, the GATE would be cut off for a while, VDD pin voltage descends gradually.
When VDD reaches 12.7V, the GATE pin would operate again, which the frequency is 22KHz and the max. Duty cycle is 14%.
Leading-edge Blanking (LEB)
Each time the power MOSFET is switched on, a turn-on spike will inevitably occur at the Sense pin, which would disturb the
internal signal from the sampling of the RSENSE. There is a 300nS leading edge blanking time built in to avoid the effect of the
turn-on spike, and the power MOSFET cannot be switched off during the moment. So that the conventional external RC filtering
on sense input is no longer required.
Over Voltage Protection (OVP)
There is a 25.6V over-voltage protection circuit in the RS2051 to improve the credibility and extend the life of the chip. When the
VDD voltage is over 25.6V, the GATE pin is to shutdown immediately and the VDD voltage is to descend rapidly.
DS-RS2051-02
September, 2007
www.Orister.com
ORISTER [ ORISTER CORPORATION ]
