OXFORD SEMICONDUCTOR LTD.
OX12PCI840
4.2.1
31
PCI Configuration Space Register map
16
Configuration Register Description
15
0
Device ID
Status
BIST
1
Vendor ID
Command
Class Code
Revision ID
Header Type
Reserved
Reserved
Base Address Register 0 (BAR0) - Function in I/O space
Base Address Register 1 (BAR 1) - Function in I/O space
Base Address Register 2 (BAR 2) – Local Configuration Registers in IO space
Base Address Register 3 (BAR3) – Local Configuration Registers in Memory space
Base Address Register 4 (BAR4) – Function in Memory Space
Reserved
Reserved
Subsystem ID
Subsystem Vendor ID
Reserved
Reserved
Cap_Ptr
Reserved
Reserved
Reserved
Interrupt Pin
Interrupt Line
Power Management Capabilities (PMC)
Next Ptr
Cap_ID
Reserved
Reserved
PMC Control/Status Register (PMCSR)
Table 2: PCI Configuration space
Register name
Vendor ID
Device ID
Command
Status
Revision ID
Class code
Header type
BAR 0
BAR 1
BAR 2
BAR 3
BAR 4
Subsystem VID
Subsystem ID
Cap ptr.
Interrupt line
Interrupt pin
Cap ID
Next ptr.
PM capabilities
PMC control/ status register
Reset value
0x1415
0x8403
0x0000
0x0290
0x00
0x070103
0x00
0x00000001
0x00000001
0x00000001
0x00000000
Reserved
0x1415
0x0001
0x40
0x00
0x01
0x01
0x00
0x6C01
0x0000
Program read/write
EEPROM
PCI
W
R
W
R
-
R/W
W(bit 4)
R/W
-
R
W
R
-
R
-
R/W
-
R/W
-
R/W
-
R/W
-
R/W
W
R
W
-
-
W
-
-
W
-
R
R
R/W
R
R
R
R
R/W
Offset
Address
00h
04h
08h
0Ch
10h
14h
18h
1Ch
20h
24h
28h
2Ch
30h
34h
38h
3Ch
40h
44h
Table 3: PCI configuration space default values
DS-0021 Jun 05
Page 10
OXFORD [ OXFORD SEMICONDUCTOR ]
