OXFORD SEMICONDUCTOR LTD.
OX16C950 rev B
Register Address R/W
Bit 7
Bit 6
Name
To access these registers LCR must be set to 0xBF
RTS
EFR
010
R/W
CTS
Flow
flow
control
control
XON1
100
R/W
9-bit mode
XON2
9-bit mode
XOFF1
9-bit mode
XOFF2
9-bit mode
101
110
111
R/W
R/W
R/W
Bit 5
Special
char
detect
Bit 4
Enhanced
mode
Bit 3
Bit 2
Bit 1
Bit 0
In-band flow control mode
XON Character 1
Special character 1
XON Character 2
Special Character 2
XOFF Character 1
Special character 3
XOFF Character 2
Special character 4
Table 5: 650 Compatible Registers
Register
Name
ASR
1,6,7
RFL
6
TFL
3,6
ICR
3,8,9
Address
001
011
100
101
R/W
R/W
7
R
R
R/W
Bit 7
Tx
Idle
Bit 6
FIFO
size
Bit 5
FIFO-
SEL
Bit 4
Bit 3
Bit 2
Bit 1
Remote
Tx
Disabled
Bit 0
Tx
Disabled
DTR
RTS
Special
Char
Detect
Number of characters in the receiver FIFO
Number of characters in the transmitter FIFO
Data read/written depends on the value written to the SPR prior to
the access of this register (see
Table 7
)
Table 6: 950 Specific Registers
Register access notes:
Note 1: Requires LCR[7] = 0
Note 2: Requires ACR[7] = 0
Note 3: Requires that last value written to LCR was not 0xBF
Note 4: To read this register ACR[7] must be = 0
Note 5: To read this register ACR[6] must be = 0
Note 6: Requires ACR[7] = 1
Note 7: Only bits 0 and 1 of this register can be written
Note 8: To read this register ACR[6] must be = 1
Note 9: This register acts as a window through which to read and write registers in the Indexed Control Register set
Data Sheet Revision 1.2
Page 16
OXFORD [ OXFORD SEMICONDUCTOR ]
