s
Absolute Maximum Ratings (Ta=25˚C)
Parameter
Supply voltage
Supply current
Power dissipation
Operating ambient temperature
Storage temperature
AN8000 Series
AN8000M Series
Symbol
V
I
I
CC
P
D
T
opr
T
stg
Rating
20
100
650 *
–30 to+80
–55 to+150
–55 to+125
Unit
V
mA
mW
˚C
˚C
* Mounting onto the PCB (20
×
20
×
1.7mm glass epoxy copper foil 1 cm
2
or more), for AN8000M Series.
s
Electrical Characteristics (Ta=25˚C)
·
AN8002/AN8002M (2V Type)
Parameter
Output voltage
Line regulation
Load regulation
Symbol
V
O
REG
IN
REG
L
V
DIF (min.)
I
bias
RR
V
no
∆V
O
/Ta
T
j
=25˚C
Condition
V
I
=2.5 to 8V, T
j
=25˚C
I
O
=1 to 40mA, T
j
=25˚C
I
O
=1 to 50mA, T
j
=25˚C
V
I
=1.9V, I
O
=20mA, T
j
=25˚C
V
I
=1.9V, I
O
=50mA, T
j
=25˚C
I
O
=0mA, T
j
=25˚C
V
I
=3 to 5V, f=120Hz
f=10Hz to 100kHz
T
j
=–30 to+125˚C
min
1.92
typ
2
2
7
10
0.06
0.12
0.6
max
2.08
40
20
25
0.2
0.3
1
Unit
V
mV
mV
mV
V
V
mA
dB
µV
mV/˚C
Minimum I/O voltage difference
Bias current
Ripple rejection ratio
Output noise voltage
Output voltage temperature coefficient
62
74
60
0.1
Note1) The specified condition T
j
=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that
the drift in characteristic value due to a temperature rise at chip junction can be ignored.
Note2) Unless otherwise specified, V
I
=3V, I
O
=20mA, C
O
=10µF
·
AN8025/AN8025M (2.5V Type)
Parameter
Output voltage
Line regulation
Load regulation
Minimum I/O voltage difference
Bias current
Ripple rejection ratio
Output noise voltage
Output voltage temperature coefficient
Symbol
V
O
REG
IN
REG
L
V
DIF (min.)
I
bias
RR
V
no
∆V
O
/Ta
T
j
=25˚C
V
I
=3 to 8.5V, T
j
=25˚C
I
O
=1 to 40mA, T
j
=25˚C
I
O
=1 to 50mA, T
j
=25˚C
V
I
=2.4V, I
O
=20mA, T
j
=25˚C
V
I
=2.4V, I
O
=50mA, T
j
=25˚C
I
O
=0mA, T
j
=25˚C
V
I
=3.5 to 5.5V, f=120Hz
f=10Hz to 100kHz
T
j
=–30 to+125˚C
60
Condition
min
2.4
typ
2.5
2.5
8
12.5
0.07
0.12
0.6
72
65
0.13
max
2.6
50
20
25
0.2
0.3
1
Unit
V
mV
mV
mV
V
V
mA
dB
µV
mV/˚C
Note1) The specified condition T
j
=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that
the drift in characteristic value due to a temperature rise at chip junction can be ignored.
Note2) Unless otherwise specified, V
I
=3.5V, I
O
=20mA, C
O
=10µF
PANASONIC [ PANASONIC SEMICONDUCTOR ]
