PE9601
Product Specification
Table 5. DC Characteristics
V
DD
= 3.0 V, -40° C < T
A
< 85° C, unless otherwise specified
Symbol
I
DD
Parameter
Operational supply current;
Test Program Name
IDD_T_oper_at_2 GHz
Conditions
V
DD
= 2.85 to 3.15 V
Min
Typ
24
Max
Units
mA
Prescaler enabled 2 GHz
center frequency with 10
MHz reference input.
Digital Inputs: All except f
r
, R
0
, F
in
,
F
in
V
IH
High level input voltage
LEVELS_”xxx”_VIH(V)
where “xxx” is name of pin
being tested
LEVELS_”xxx”_VIL(V)
where “xxx” is name of pin
being tested
IIH_”xxx”_(A) where “xxx”
is name of pin being
tested
IIL_”xxx”_(A) where “xxx”
is name of pin being
tested
IIH_FR_(A)
IIL_FR_(A)
V
DD
= 2.85 to 3.15 V
0.7 x V
DD
V
V
IL
Low level input voltage
V
DD
= 2.85 to 3.15 V
0.3 x V
DD
V
I
IH
High level input current
(Pull-down resistor on
input)
Low level input current
V
IH
= V
DD
= 3.15 V
+100
µA
I
IL
V
IL
= 0, V
DD
= 3.15 V
-1
µA
Reference Divider input: f
r
I
IHR
I
ILR
High level input current
Low level input current
V
IH
= V
DD
= 3.15 V
V
IL
= 0, V
DD
= 3.15 V
-50
+50
µA
µA
R0 Input (Pull-up Resistor): R
0
I
IHR
High level input current
(Pull-down resistor on
input)
Low level input current
IIH_R0_(A)
V
IH
= V
DD
= 3.15 V
+100
µA
I
ILR
IIL_R0_(A)
V
IL
= 0, V
DD
= 3.15 V
-3
µA
Counter and phase detector outputs: f
c
, f
p
.
V
OLD
Output voltage LOW
LEVELS_”xxx”_VOL(V)
where “xxx” is name of pin
being tested
LEVELS_”xxx”_VOH(V)
where “xxx” is name of pin
being tested
LEVELS_CEXT_VOL(V)
LEVELS_CEXT_VOH(V)
LEVELS_ LD_VOL(V)
I
out
= 6 mA
0.4
V
V
OHD
Output voltage HIGH
I
out
= -3 mA
V
DD
- 0.4
V
Lock detect outputs: Cext, LD
V
OLC
V
OHC
V
OLLD
Output voltage LOW, Cext
Output voltage HIGH, Cext
Output voltage LOW, LD
I
out
= 0.1 mA
I
out
= -0.1 mA
I
out
= 6 mA
V
DD
- 0.4
0.4
0.4
V
V
V
Charge Pump output: CP
I
CP
- Source
I
CP
– Sink
I
CPL
I
CP
– Source
vs. I
CP
Sink
I
CP
vs. V
CP
Drive current
Drive current
Leakage current
Sink vs. source mismatch
Output current magnitude
variation vs. voltage
CP_src_at_0.5 VDD (A)
CP_snk_at_0.5 VDD (A)
CP_lkg_PD_DX (A)
CP_srcvsnk_at_0.5 VDD
CP_snk_var,
CP_src_var
V
CP
= V
DD
/ 2
V
CP
= V
DD
/ 2
1.0 V < V
CP
< V
DD
–
1.0 V
V
CP
= V
DD
/ 2,
T
A
= 25° C
1.0V < V
CP
< V
DD
–
1.0 V T
A
= 25° C
-2.6
1.4
-1
-2
2
-1.4
2.6
1
25
25
mA
mA
µA
%
%
©2005 Peregrine Semiconductor Corp. All rights reserved.
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Document No. 70-0025-05
│
UltraCMOS™ RFIC Solutions
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