PI7C8150A
2-PORT PCI-TO-PCI BRIDGE
Pin
Number
J2
J5
J8
J11
J14
K1
K4
K7
K10
K13
K16
L3
L6
L9
L10
L13
L16
M3
M6
M9
M12
M15
N2
N5
N8
N11
N14
P1
P4
P7
P10
P13
P16
R3
R6
R9
R12
R15
T2
T5
T8
T11
T14
Name
GPIO[2]
VDD
VSS
VSS
RESERVED
GPIO[0]
VDD
VSS
VSS
VDD
CFG66
SCAN_EN_H
S_CLKOUT[5]
VSS
VSS
VSS
P_AD[4]
P_AD[0]
S_CLKOUT[9]
VDD
VDD
VSS
P_AD[5]
BPCCE
P_AD[28]
VDD
P_PAR
VSS
P_RESET_L
VSS
P_AD[22]
P_DEVSEL_L
VDD
P_AD[9]
VDD
P_CBE_L[3]
P_CBE_L[2]
P_AD[15]
VSS
P_AD[30]
P_AD[26]
P_AD[19]
P_STOP_L
P_AD[13]
Type
TS
P
P
P
-
TS
P
P
P
P
I
O
P
P
P
TS
TS
O
P
P
P
TS
I
TS
P
TS
P
I
P
TS
STS
P
TS
P
TS
TS
TS
P
TS
TS
TS
STS
TS
Pin
Number
J3
J6
J9
J12
J15
K2
K5
K8
K11
K14
L1
L4
L7
L11
L14
M1
M4
M7
M10
M13
M16
N3
N6
N9
N12
N15
P2
P5
P8
P11
P14
R1
R4
R7
R10
R13
R16
T3
T6
T9
T12
T15
Name
GPIO[3]
VSS
VSS
VDD
TDI
S_CLKOUT[0]
VDD
VSS
VSS
P_VIO
S_CLKOUT[2]
S_CLKOUT[6]
VSS
VSS
P_AD[2]
S_CLKOUT[4]
P_CLK
VDD
VDD
P_AD[6]
P_AD[3]
P_AD[31]
P_AD[25]
VDD
P_AD[11]
P_AD[8]
P_REQ_L
P_AD[27]
P_AD[18]
P_SERR_L
VSS
P_GNT_L
VSS
P_AD[20]
P_TRDY_L
P_AD[12]
MS1
VDD
P_AD[23]
P_AD[16]
P_PERR_L
P_AD[10]
Type
TS
P
P
P
I
O
P
P
P
I
O
O
P
P
TS
O
I
P
P
TS
TS
TS
TS
P
TS
TS
TS
TS
TS
OD
P
I
P
TS
STS
TS
P
P
TS
TS
STS
TS
Pin
Number
J4
J7
J10
J13
J16
K3
K6
K9
K12
K15
L2
L5
L8
L12
L15
M2
M5
M8
M11
M14
N1
N4
N7
N10
N13
N16
P3
P6
P9
P12
P15
R2
R5
R8
R11
R14
T1
T4
T7
T10
T13
T16
Name
VDD
VSS
VSS
VDD
RESERVED
S_CLKOUT[1]
VSS
VSS
VDD
MSK_IN
S_CLKOUT[3]
VDD
VSS
VDD
P_AD[1]
S_CLKOUT[8]
VSS
VDD
VDD
P_AD[7]
S_CLKOUT[7]
VSS
VDD
VDD
VSS
P_CBE_L[0]
VSS
P_IDSEL
P_FRAME_L
P_AD[14]
VDD
VSS
P_AD[24]
P_AD[17]
P_LOCK_L
P_M66EN
VSS
P_AD[29]
P_AD[21]
P_IRDY_L
P_CBE_L[1]
VSS
Type
P
P
P
P
-
O
P
P
P
I
O
P
P
P
TS
O
P
P
P
TS
O
P
P
P
P
TS
P
I
STS
TS
P
P
TS
TS
STS
I
P
TS
TS
STS
TS
P
3
PCI BUS OPERATION
This Chapter offers information about PCI transactions, transaction forwarding across
PI7C8150A, and transaction termination. The PI7C8150A has two 128-byte FIFO’s for
buffering of upstream and downstream transactions. These hold addresses, data,
commands, and byte enables that are used for write transactions. The PI7C8150A also has
an additional four 128-byte FIFO’s that hold addresses, data, commands, and byte enables
for read transactions.
Page 21 of 111
APRIL 2006 – Revision 1.1
06-0057
PERICOM [ PERICOM SEMICONDUCTOR CORPORATION ]
