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PL560-48QCLR 参数 Datasheet PDF下载

PL560-48QCLR图片预览
型号: PL560-48QCLR
PDF下载: 下载PDF文件 查看货源
内容描述: 模拟倍频器 [Analog Frequency Multiplier]
分类和应用: 倍频器
文件页数/大小: 15 页 / 887 K
品牌: PLL [ PHASELINK CORPORATION ]
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Analog Frequency Multiplier
PL560-xx VCXO Family
DETERMINING STRAY L’s AND C’s IN A LAYOUT
Figure 6: Diagram Representation of the Board Layout
Lets take the PL560-38 (4x VCXO) for example. This takes a crystal input in the range of 30 to 80 MHz and
multiplies it to an output of 120 to 320 MHz. To determine the stray L’s and C’s of the layout we will assemble
two test units. One AFM will be tuned to the lower range of the device (120 MHz), and the other to the upper
range of the device (320 MHz).
120 MHz AFM Tuning:
Using the “AFM Tuning Assistant” find the PL560-3x in the L2X worksheet. Enter the
Cinternal value found next to it into cell B21. In cell B24 enter the closest standard inductor value (see CoilCraft
0603CS series for example) to achieve the closest peak frequency to 60 MHz. Repeat the same procedure for
L4X at 120 MHz.
Results: L2X = 180 nH, L4X = 82 nH.
320 MHz AFM tuning:
Repeat the previous procedure for L2X at 120 MHz and L4X at 320 MHz.
Results: L2X = 24 nH, L4X = 10 nH.
Proceed and assemble the test units.
Measuring 120 MHz L2X:
Connect the RF generator and scope probe as shown in Figure 6, above. While
power is applied to the PCB, set the generator output to +12 dBm and the frequency to 30 MHz. Since this is the
2x port, the scope will show 60 MHz with ~ 3V pk-pk amplitude. Vary the generator above and below 30 MHz until
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Rev.:02-09-07 Page 7