(Preliminary) PL580-35/37/38/39
38MHz-320MHz Low Phase Noise VCXO
10. PECL Electrical Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
MAX.
UNITS
Output High Voltage
Output Low Voltage
VOH
VOL
VDD – 1.025
V
V
RL = 50 Ω to (VDD – 2V)
(see figure)
VDD – 1.620
11. PECL Switching Characteristics
PARAMETERS
SYMBOL
FREQ.
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Clock Rise & Fall Times
<150MHz
0.2
0.5
0.4
0.7
@20/80% - PECL
@80/20% - PECL
tr & tf
ns
>150MHz
<320MHz
Clock Rise & Fall Times
0.2
0.55
PECL Levels Test Circuit
PECL Output Skew
OUT
VDD
OUT
50
50
Ω
Ω
2.0V
50%
OUT
tSKEW
OUT
PECL Transistion Time Waveform
DUTY CYCLE
45 - 55%
55 - 45%
OUT
80%
50%
20%
OUT
tR
tF
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 12/14/06 Page 7
PLL [ PHASELINK CORPORATION ]
