Preliminary
PL623-38
Low Phase Noise XO (for 3
rd
O.T.) For 65-130MHz
2. Crystal Specifications
Name
Parallel Resonant mode
Load capacitance (capacitance on
built-in on die seen by crystal)
Inter-electrode capacitance
Equivalent Series Resistance
Oscillation Frequency
C
L
C
0
ESR
3
rd
Overtone
65
Symbol
Conditions
3
rd
Overtone
Die only, no bond wire,
no package
5
4
35
130
Min.
Max.
Units
N/A
pF
pF
Ω
MHz
3. General Electrical Specifications
PARAMETERS
Supply Current (Loaded
Outputs)
Operating Voltage
Output Clock Duty Cycle
Short Circuit Current
SYMBO
L
I
DD
V
DD
CONDITIONS
PECL
MIN.
TYP.
MAX.
85/55
UNITS
mA
V
%
mA
2.25
@ Vdd – 1.3V (PECL)
45
50
±50
3.63
55
4. Jitter Specifications
PARAMETERS
Period jitter RMS at 106.25MHz
Period jitter peak-to-peak at 106.25MHz
Integrated jitter RMS at 106.25MHz
*Measured on Agilent E5500.
CONDITIONS
With capacitive decoupling
between VDD and GND.
Integrated 12 kHz to 20 MHz
MIN.
TYP.
2.0
17.0
0.3*
MAX.
UNITS
ps
ps
5. Phase Noise Specifications
PARAMETERS
Phase Noise vs. carrier
with fund. crystal.
FREQUENCY
106.25MHz
@10Hz
-55
@100Hz
-90
@1kHz
-110
@10kHz
-135
@100kHz
-145
UNITS
dBc/Hz
*: Note: Phase noise to be measured. Based on P520-20 product (fundamental 155MHz VCXO).
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
www.phaselink.com
Rev 05/03/05 Page 4
PLL [ PHASELINK CORPORATION ]
