PO100HSTL11A
1 to 2 Differential Clock/Data Fanout Buffer
2.4V -3.6V Differential inputs to HSTL outputs Clock Buffer
02/11/07
Packaging Mechanical Drawing: 8 pin SOIC
8
.0099
.0196
0.25
x 45˚
0.50
0-8˚
.149
.157
3.78
3.99
.016
.050
0.40
1.27
.2284
.2440
5.80
6.20
1
.189
.196
.016
.026
0.406
0.660
REF
.050
BSC
1.27
.013 0.330
.020 0.508
.0040 0.10
.0098 0.25
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
4.80
5.00
.053
.068
1.35
1.75
SEATING PLANE
.0075
.0098
0.19
0.25
Packaging Mechanical Drawing: 8 pin TSSOP
8
SEATING PLANE
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
5
Copyright
© 2006, Potato Semiconductor Corporation