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PO74G112A 参数 Datasheet PDF下载

PO74G112A图片预览
型号: PO74G112A
PDF下载: 下载PDF文件 查看货源
内容描述: 双负边沿触发的JK触发器具有清零和预设 [DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET]
分类和应用: 触发器
文件页数/大小: 6 页 / 579 K
品牌: POTATO [ POTATO SEMICONDUCTOR CORPORATION ]
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PO74G112A  
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP  
WITH CLEAR AND PRESET  
04/19/09  
74 Series GHz Logic  
Maximum Ratings  
Description  
Note:  
Max  
-65 to 150  
Unit  
stresses greater than listed under  
Maximum  
Ratings  
may  
cause  
Storage Temperature  
Operation Temperature  
Operation Voltage  
Input Voltage  
°C  
°C  
V
permanent damage to the device. This  
is a stress rating only and functional  
operation of the device at these or any  
other conditions above those indicated  
in the operational sections of this  
specification is not implied. Exposure  
to absolute maximum rating conditions  
for extended periods may affect  
reliability specification is not implied.  
-55 to 125  
-0.5 to +4.6  
-0.5 to +5.5  
-0.5 to Vcc+0.5  
V
Output Voltage  
V
DC Electrical Characteristics  
Symbol  
Description  
Output High voltage  
Output Low voltage  
Input High voltage  
Input Low voltage  
Input High current  
Input Low current  
Clamp diode voltage  
Test Conditions  
Min  
Typ Max  
Unit  
V
Vcc=3V Vin=VIH or VIL, IOH= -12mA  
Vcc=3V Vin=VIH or VIL, IOH=12mA  
Guaranteed Logic HIGH Level (Input Pin)  
Guaranteed Logic LOW Level (Input Pin)  
Vcc = 3.6V and Vin = 5.5V  
VOH  
VOL  
VIH  
VIL  
IIH  
2.4  
3
0.3  
-
-
0.5  
5.5  
0.8  
1
-
V
2
V
-0.5  
-
V
-
-
-
-
uA  
uA  
V
Vcc = 3.6V and Vin = 0V  
IIL  
-
-1  
VIK  
Vcc = Min. And IIN = -18mA  
-0.7 -1.2  
Notes:  
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.  
2. Typical values are at Vcc = 3.3V, 25 °C ambient.  
3. This parameter is guaranteed but not tested.  
4. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.  
5. VoH = Vcc – 0.6V at rated current  
2
Copyright © Potato Semiconductor Corporation