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PO74HSTL85331A 参数 Datasheet PDF下载

PO74HSTL85331A图片预览
型号: PO74HSTL85331A
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V 1 : 4的晶体振荡器/差分时钟或数据扇出缓冲器 [3.3V 1:4 Crystal Oscillator/ Differential Clock or Data Fanout Buffer]
分类和应用: 振荡器晶体振荡器时钟
文件页数/大小: 8 页 / 670 K
品牌: POTATO [ POTATO SEMICONDUCTOR CORPORATION ]
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3.3V 1:4 Crystal Oscillator/
Differential Clock or Data Fanout Buffer
PO74HSTL85331A
08/03/06
700MHz HSTL Potato Chip
Pin Definitions
Nu m b e r
1
2
3
4
5
6
7
8, 9
10, 13, 18
11, 12
14, 15
16, 17
19, 20
Na m e
V
E E
C LK_ EN
C LK_ S EL
C LK
n C LK
XTAL1
XTAL2
nc
V
C C
n Q 3 , Q3
n Q 2 , Q2
n Q 1 , Q1
n Q 0 , Q0
P o we r
In p ut
In p ut
In p ut
In p ut
In p u t
In p u t
Un u s e d
P o we r
O u tp ut
O u tp ut
O u tp ut
O u tp ut
Ty p e
De s c r ip t io n
GND Pin
S yn c h ro n iz in g c lo c k e n a b le . Wh e n HIG H, c lo c k o u tp u ts fo llo ws c lo c k in p u t.
P u llu p
Wh e n LOW, Q o u tp u ts a re fo rc e d lo w, n Q o u tp u ts a re fo rc e d h ig h .
LVC MO S / LVTTL in te rfa c e le ve ls .
C lo c k s e le c t in p u t. Wh e n LOW, s e le c ts C LK, n C LK in p u t.
P u lld o w n
Wh e n HIG H, s e le c ts XTAL in p u t. LVC MO S / LVTTL in te rfa c e le ve ls .
P u lld o w n No n -in ve r tin g d iffe re n tia l c lo c k in p u t.
P u llu p
P u llu p
In ve r tin g d iffe re n tia l c lo c k in p u t.
C r ys ta l o s c illa to r in p u t.
No c o n n e c t.
P o s itive s u p p ly p in s .
Diffe re n tia l c lo c k o u tp u ts . HSTL in te rfa c e le ve ls .
Diffe re n tia l c lo c k o u tp u ts . HSTL in te rfa c e le ve ls .
Diffe re n tia l c lo c k o u tp u ts . HSTL in te rfa c e le ve ls .
Diffe re n tia l c lo c k o u tp u ts . HSTL in te rfa c e le ve ls .
P u lld o w n C r ys ta l o s c illa to r in p u t.
NOTE :
P u llu p
a n d
P u lld o wn
re fe r to in te rn a l in p u t re s is to rs . S e e Ta b le 2 , P in c h a ra c te ris tic s , fo r typ ic a l va lu e s .
Function Table
In p u t s
C LK_ E N
0
0
1
C LK_ S E L
0
1
0
S e le c t e d S o u r c e
C LK, n C LK
XTAL1 , XTAL2
C LK, n C LK
Q0:Q3
Dis a b le d ; LOW
Dis a b le d ; LOW
E n a b le d
Ou tp u ts
n Q0:n Q3
Dis a b le d ; HIG H
Dis a b le d ; HIG H
E n a b le d
1
1
XTAL1 , XTAL2
E n a b le d
E n a b le d
Afte r C LK_ E N s witc h e s , th e c lo c k o u tp u ts a re d is a b le d o r e n a b le d fo lo win g a ris in g a n d fa llin g in p u t c lo c k o r
c rys ta l o s c illa to r e d g e a s s h o wn in
F ig u re 1
.
In th e a c tive m o d e , th e s ta te o f th e o u tp u ts a re a fu n c tio n o f th e C LK, n C LK a n d XTAL1 , XTAL2 in p u ts a s d e s c rib e d
in Ta b le 3 B.
Pin Characteristics
S ym b o l
C
IN
R
P ULLUP
R
P ULLDOWN
P a r a m e t er
In p u t C a p a c ita n c e
In p u t P u llu p R e s is to r
In p u t P u lld o wn R e s is to r
Te s t C o n d it io n s
Min im u m
Ty p ic a l
4
88
88
Ma x im u m
Un it s
pF
K
K
2
Copyright
© Potato Semiconductor Corporation