TOP252-262
V
C
0
CONTROL (C)
Z
C
1
SHUNT REGULATOR/
ERROR AMPLIFIER
-
+
I
FB
VI
(LIMIT)
DRAIN (D)
INTERNAL
SUPPLY
-
+
5.8 V
4.8 V
SOFT START
+
-
K
PS(UPPER)
-
+
5.8 V
INTERNAL UV
COMPARATOR
CURRENT
LIMIT
ADJUST
ON/OFF
÷
16
SHUTDOWN/
AUTO-RESTART
STOP LOGIC
K
PS(LOWER)
-
+
EXTERNAL
CURRENT
LIMIT (X)
VOLTAGE
MONITOR (V)
V
BG
+ V
T
CURRENT LIMIT
COMPARATOR
SOURCE (S)
CONTROLLED
TURN-ON
GATE DRIVER
1V
HYSTERETIC
THERMAL
SHUTDOWN
V
LINE
SENSE
OVP OV/
UV
DC
MAX
DC
MAX
66k/132k
STOP
SOFT
START
D
MAX
CLOCK
S
R
Q
OSCILLATOR
WITH JITTER
F REDUCTION
FREQUENCY
(F)
LEADING
EDGE
BLANKING
F REDUCTION
SOFT START
I
FB
PWM
I
PS(UPPER)
I
PS(LOWER)
OFF
K
PS(UPPER)
K
PS(LOWER)
SOURCE (S)
PI-4511-082907
Figure 3c. Functional Block Diagram (TOP254-258 YN Package and all eSIP Packages).
V
C
0
CONTROL (C)
Z
C
1
SHUNT REGULATOR/
ERROR AMPLIFIER
-
+
DRAIN (D)
INTERNAL
SUPPLY
-
+
5.8 V
4.8 V
SOFT START
+
-
K
PS(UPPER)
-
+
5.8 V
INTERNAL UV
COMPARATOR
VI
(LIMIT)
I
FB
CURRENT
LIMIT
ADJUST
ON/OFF
÷
16
SHUTDOWN/
AUTO-RESTART
STOP LOGIC
K
PS(LOWER)
-
+
EXTERNAL
CURRENT
LIMIT (X)
VOLTAGE
MONITOR (V)
V
BG
+ V
T
CURRENT LIMIT
COMPARATOR
SOURCE (S)
CONTROLLED
TURN-ON
GATE DRIVER
1V
HYSTERETIC
THERMAL
SHUTDOWN
V
LINE
SENSE
OVP OV/
UV
DC
MAX
DC
MAX
STOP
SOFT
START
D
MAX
CLOCK
S
R
Q
OSCILLATOR
WITH JITTER
F REDUCTION
LEADING
EDGE
BLANKING
SOURCE (S)
F REDUCTION
SOFT START
I
FB
PWM
I
PS(UPPER)
I
PS(LOWER)
OFF
K
PS(UPPER)
K
PS(LOWER)
PI-4974-122607
SIGNAL
GROUND (G)
Figure 3d. Functional Block Diagram TOP259YN, TOP260YN, TOP261YN.
5
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Rev. F 01/09
POWERINT [ POWER INTEGRATIONS, INC. ]
