May 2008
rev 0.2
AC Electrical Characteristics
Symbol
CLKIN/XIN
Input Clock Frequency
Pin 10
CLK OUT
Output Clock Frequency
Pin 7,8
Pin 1,9
Pin 6
t
LH
1
t
HL
1
T
PJ
1
Rising edge slew rate (Measured from 20% to 80%)
Falling edge slew rate (Measured from 80% to 20%)
Peak-to-peak Period Jitter @ VDD/2
Synthesis Error (Output Frequency)
t
D
1
t
LOCK
Output Duty Cycle
PLL Lock Time from Power-Up
45
1.1
1.3
PCS1P2859A
Parameter
Min
Typ
25
33
48
127
25
1.7
2
300
0
50
1
Max
Unit
MHz
MHz
V/nS
V/nS
pS
ppm
55
3
%
mS
NOTE: 1. Measured with 15pF capacitive load
Typical Crystal Oscillator Circuit
R1 = 510Ω
C1 = 27 pF
C2 = 27 pF
Typical Crystal Specifications
Fundamental AT cut parallel resonant crystal
Nominal frequency
Frequency tolerance
Operating temperature range
Storage temperature
Load capacitance
Shunt capacitance
ESR
25MHz
± 50 ppm or better at 25°C
-25°C to +85°C
-40°C to +85°C
18pF
7pF maximum
25Ω
Multi-Output Clock Synthesizer
Notice: The information in this document is subject to change without notice.
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