P4C1024
AC ELECTRICAL CHARACTERISTICS—READ CYCLE
(V
CC
= 5V ± 10%, All Temperature Ranges)
(2)
Symbol
t
RC
t
AA
t
AC
t
OH
Parameter
Read Cycle
Time
Address
Access Time
Chip Enable
Access Time
Output Hold
from Address
Change
Chip Enable to
Output in Low Z
Chip Disable
to Output in
High Z
Output Enable
Low to Data
Valid
Output Enable
Low to Low Z
Output Enable
High to High Z
Chip Enable to
Power Up
Time
Chip Disable
to Power Down
Time
0
0
7
0
3
-15
-20
-25
-35
-45
-55
-70
-85
-100
-120
Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Unit
15
15
15
3
20
20
20
3
25
25
25
3
35
35
35
3
45
45
45
3
55
55
55
3
70
70
70
3
85
85
85
3
100
100
100
3
120
120
120
ns
ns
ns
ns
t
LZ
t
HZ
3
8
3
9
3
11
3
15
3
20
3
25
3
30
3
35
3
40
3
50
ns
ns
t
OE
t
OLZ
t
OHZ
t
PU
7
0
9
0
9
0
11
0
11
0
15
0
15
0
20
0
20
0
25
0
25
0
30
0
30
0
35
0
35
0
40
0
40
0
50
ns
ns
50
ns
ns
t
PD
12
20
20
20
25
30
35
40
45
50
ns
TIMING WAVEFORM OF READ CYCLE NO. 1 (OE CONTROLLED)
(5)
OE
Notes:
5.
WE
is HIGH for READ cycle.
6.
CE
1
is LOW, CE
2
is HIGH and
OE
is LOW for READ cycle.
7. ADDRESS must be valid prior to, or coincident with
CE
1
transition
LOW and CE
2
transition HIGH.
8. Transition is measured ± 200 mV from steady state voltage prior to
change, with loading as specified in Figure 1. This parameter is
sampled and not 100% tested.
Document #
SRAM124
REV A
Page 4 of 14
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