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P4C116-15FSMB 参数 Datasheet PDF下载

P4C116-15FSMB图片预览
型号: P4C116-15FSMB
PDF下载: 下载PDF文件 查看货源
内容描述: 超高速2K x 8静态CMOS RAMS [ULTRA HIGH SPEED 2K x 8 STATIC CMOS RAMS]
分类和应用:
文件页数/大小: 14 页 / 239 K
品牌: PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
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P4C116/P4C116L
DATA RETENTION CHARACTERISTICS (P4C116L Military Temperature Only)
Symbol
V
DR
I
CCDR
t
CDR
t
R†
*T
A
= +25°C
§t
RC
= Read Cycle Time
Parameter
V
CC
for Data Retention
Data Retention Current
Chip Deselect to
Data Retention Time
Operation Recovery Time
Test Conditons
Min
2.0
Typ.*
V
CC
=
2.0V
3.0V
Max
V
CC
=
2.0V
3.0V
Unit
V
CE
V
CC
–0.2V,
V
IN
V
CC
–0.2V
or V
IN
0.2V
0
t
RC§
10
15
600
900
µA
ns
ns
This parameter is guaranteed but not tested.
DATA RETENTION WAVEFORM
POWER DISSIPATION CHARACTERISTICS VS. SPEED
Symbol
I
CC
Parameter
Dynamic Operating Current*
Temperature
Range
Commercial
Military
–10
180
N/A
–12
170
N/A
–15
160
170
–20
155
160
–25
150
155
–35
140
150
Unit
mA
mA
*V
CC
= 5.5V. Tested with outputs open. f = Max. Switching inputs are 0V and 3V.
CE
= V
IL
,
OE
= V
IH
.
AC ELECTRICAL CHARACTERISTICS—READ CYCLE
(V
CC
= 5V ± 10%, All Temperature Ranges)
(2)
Sym.
t
RC
t
AA
t
AC
t
OH
t
LZ
t
HZ
t
OE
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Hold from Address Change
Chip Enable to Output in Low Z
Chip Disable to Output in High Z
Output Enable Low to Data Valid
–10
10
10
10
2
2
5
6
0
6
0
10
0
0
2
2
–12
12
12
12
2
2
6
8
0
7
0
12
–15
15
15
15
2
2
7
10
0
8
0
15
–20
20
20
20
2
3
8
10
0
9
0
20
–25
25
25
25
2
3
10
15
0
12
0
20
–35
35
35
35
Min Max Min Max Min Max Min Max Min Max Min Max
Unit
ns
ns
ns
ns
ns
15
20
15
25
ns
ns
ns
ns
ns
ns
t
OLZ
Output Enable Low to Low Z
t
OHZ
Output Enable High to High Z
t
PU
t
PD
Chip Enable to Power Up Time
Chip Disable to Power Down
Document #
SRAM110
REV A
Page 3 of 14