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HYB18T256400AF 参数 Datasheet PDF下载

HYB18T256400AF图片预览
型号: HYB18T256400AF
PDF下载: 下载PDF文件 查看货源
内容描述: 240引脚注册DDR2 SDRAM模组 [240-Pin Registered DDR2 SDRAM Modules]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 42 页 / 2303 K
品牌: QIMONDA [ QIMONDA AG ]
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Internet Data Sheet
HYS72T64301HP–[3S/3.7]–A
Registered DDR2 SDRAM Modules
1.2
Description
capacitive loading to the system bus, but adds one cycle to
the SDRAM timing. Decoupling capacitors are mounted on
the PCB board. The DIMMs feature serial presence detect
based on a serial E
2
PROM device using the 2-pin I
2
C
protocol. The first 128 bytes are programmed with
configuration data and the second 128 bytes are available to
the customer.
The QIMONDA HYS72T64301HP–[3S/3.7]–A module family
are Very Low Profile (VLP) Registered DIMM (RDIMM with
parity) with 18.30 mm height based on DDR2 technology.
DIMMs are available as ECC modules in 64M x 72
(512 MByte) organization and density, intended for mounting
into 240-Pin connector sockets.
The memory array is designed with 256-Mbit Double-Data-
Rate-Two (DDR2) Synchronous DRAMs. All control and
address signals are re-driven on the DIMM using register
devices and a PLL for the clock distribution. This reduces
TABLE 3
Ordering Information for RoHS Compliant Products
Product Type
1)
PC2-5300
HYS72T64301HP–3S–A
PC2-4200
HYS72T64301HP–3.7–A
512 MB 1R×4 PC2–4200P–444–12–U0
1 Rank, ECC
256 Mbit (×4)
1) All Product Types end with a place code, designating the silicon die revision. Example: HYS72T64301HP–3.7–A, indicating Rev. “A” dies
are used for DDR2 SDRAM components. For all QIMONDA DDR2 module and component nomenclature see
of this data sheet.
2) The Compliance Code is printed on the module label and describes the speed grade, for example “PC2–4200P–444–12–U0”, where 4200P
means Very Low Profile Registered DIMM modules with 4.26 GB/sec Module Bandwidth and “444-12” means Column Address Strobe
(CAS) latency = 4, Row Column Delay (RCD) latency = 4 and Row Precharge (RP) latency = 4 using the latest JEDEC SPD Revision 1.2
and produced on the Raw Card “U”
Compliance Code
2)
512 MB 1R×4 PC2–5300P–555–12–U0
Description
1 Rank, ECC
SDRAM Technology
256 Mbit (×4)
TABLE 4
Address Format
DIMM
Density
512 MB
Module
Organization
64M
×
72
Memory
Ranks
1
ECC/
Non-ECC
ECC
# of
SDRAMs
18
# of row/bank/columns bits
13/2/10
Raw Card
U
TABLE 5
Components on Modules
Product Type
1)
HYS72T64301HP
DRAM Components
DRAM Density
HYB18T256400AF
256 Mbit
DRAM Organization
64M
×
4
Note
2)
1) Green Product
2) For a detailed description of all available functions of the DRAM components on these modules see the component data sheet.
Rev. 1.0, 2006-10
09152006-R5MQ-5KS2
5