Data Sheet
HY[B/I]39S128[40/80/16][0/7]F[E/T](L)
128-MBit Synchronous DRAM
TABLE 6
Mode Register Definition (BA
1:0
= 00
B
)
Field
BL
Bits
2:0
Type
w
Description
Burst Length
Number of sequential bits per DQ related to one read/write command
Note: All other bit combinations are RESERVED
000
B
001
B
010
B
011
B
111
B
BT
3
1
2
4
8
Full Page (Sequential burst type only)
Burst Type
Sequential
0
B
1
B
Interleaved
CAS Latency
Number of full clocks from read command to first data valid window.
Note: All other bit combinations are RESERVED.
010
B
2
011
B
3
CL
6:4
TM
8:7
Test Mode
Note: All other bit combinations are RESERVED.
00
B
Mode register set
Write Burst Length
Burst write
0
B
1
B
Single bit write
Reserved, set to zero
WBL
9
12:10
Rev. 1.32, 2007-10
10122006-I6LJ-WV3H
10
QIMONDA [ QIMONDA AG ]
