Data Sheet
HY[B/I]39S128[40/80/16][0/7]F[E/T](L)
128-MBit Synchronous DRAM
TABLE 9
DC Characteristics
Parameter
Symbol
Values
Min. Max.
Unit Note/
Test Condition
V
V
V
V
V
μA
μA
1)2)
V
DD
I/O Supply Voltage
V
DDQ
Input high voltage
V
IH
Input low voltage
V
IL
Output high voltage (
I
OUT
= – 4.0 mA)
V
OH
Output low voltage (
I
OUT
= 4.0 mA)
V
OL
Input leakage current, any input(0 V <
V
IN
<
V
DD
, all other inputs = 0 V)
I
IL
Output leakage current(DQs are disabled, 0 V <
V
OUT
<
V
DDQ
)
I
OL
Supply Voltage
3.0
3.0
2.0
2.4
–
–5
–5
3.6
3.6
V
DDQ
+0.3 V
–
0.4
+5
+5
– 0.3 +0.8
1)
T
A
= 0 to 70 ºC
2) All voltages are referenced to
V
SS
3)
V
IH
may overshoot to
V
DDQ
+ 2.0 V for pulse width of < 4ns with 3.3 V.
V
IL
may undershoot to -2.0 V for pulse width < 4.0 ns with 3.3 V.
Pulse width measured at 50% points with amplitude measured peak to DC reference.
TABLE 10
Input and Output Capacitances
Parameter
Symbol
Values
1)
Min.
Input Capacitances: CK
Input Capacitance
(A0-A11, BA0, BA1, RAS, CAS, WE, CS, CKE, DQM)
Input/Output Capacitance (DQ)
C
I1
C
I2
C
I0
2.5
2.5
4.0
Max.
3.5
3.8
6.0
pF
pF
pF
2)
Unit
Note
1) Capacitance values are shown for TSOP-54 packages. Capacitance values for TFBGA packages are lower by 0.5 pF
2)
T
A
= 0 to 70 ºC;
V
DD
,
V
DDQ
= 3.3 V ± 0.3 V, f = 1 MHz
Rev. 1.32, 2007-10
10122006-I6LJ-WV3H
13
QIMONDA [ QIMONDA AG ]
