Internet Data Sheet
HYS[64/72]T[32/64/128]xx0HU–[3/3S/3.7/5]–A
Unbuffered DDR2 SDRAM Modules
1.2
Description
The memory array is designed with 512-Mbit Double-Data-
Rate-Two (DDR2) Synchronous DRAMs. Decoupling
capacitors are mounted on the PCB board. The DIMMs
feature serial presence detect based on a serial E
2
PROM
device using the 2-pin I
2
C protocol. The first 128 bytes are
programmed with configuration data and are write protected;
the second 128 bytes are available to the customer.
The Qimonda HYS[64/72]T[32/64/128]0x0HU–[3/…/5]–A
module family are unbuffered DIMM modules “UDIMMs” with
30,0 mm height based on DDR2 technology. DIMMs are
available as non-ECC modules in 32M
×
64 (256MB),
64M
×
64 (512MB), 128M
×
64 (1GB) and as ECC modules in
64M
×
72 (512MB), 128M
×
72 (1GB) organization and
density, intended for mounting into 240-pin connector
sockets.
TABLE 4
Ordering Information for RoHS Compliant Products
Product Type
1)
PC2-5300
HYS64T32000HU–3–A
HYS64T64000HU–3–A
HYS72T64000HU–3–A
HYS64T128020HU–3–A
HYS72T128020HU–3–A
HYS64T32000HU–3S–A
HYS64T32900HU–3S–A
HYS64T64000HU–3S–A
HYS64T64900HU–3S–A
HYS72T64000HU–3S–A
HYS64T128020HU–3S–A
HYS64T128920HU–3S–A
HYS72T128020HU–3S–A
PC2-4200
HYS64T32000HU–3.7–A
HYS64T32900HU–3.7–A
HYS64T64000HU–3.7–A
HYS64T64900HU–3.7–A
HYS72T64000HU–3.7–A
HYS64T128020HU–3.7–A
HYS64T128920HU–3.7–A
HYS72T128020HU–3.7–A
PC2-3200
HYS64T32000HU–5–A
HYS64T64000HU–5–A
HYS72T64000HU–5–A
256MB 1R×16 PC2–3200U–333–11–C1
512MB 1R×8 PC2–3200U–333–11–A1
512MB 1R×8 PC2–3200E–333–11–A1
1 Rank, Non-ECC
1 Rank, Non-ECC
1 Rank, ECC
512 Mbit (×16)
512 Mbit (×8)
512 Mbit (×8)
256MB 1R×16 PC2–4200U–444–11–C1
256MB 1R×16 PC2–4200U–444–11–C1
512MB 1R×8 PC2–4200U–444–11–A1
512MB 1R×8 PC2–4200U–444–11–D0
512MB 1R×8 PC2–4200E–444–11–A1
1GB 2R×8 PC2–4200U–444–11–B1
1GB 2R×8 PC2–4200U–444–11–E0
1GB 2R×8 PC2–4200E–444–11–B1
1 Rank, Non-ECC
1 Rank, Non-ECC
1 Rank, Non-ECC
1 Rank, Non-ECC
1 Rank, ECC
2 Ranks, Non-ECC
2 Ranks, Non-ECC
2 Ranks, ECC
512 Mbit (×16)
512 Mbit (×16)
512 Mbit (×8)
512 Mbit (×8)
512 Mbit (×8)
512 Mbit (×8)
512 Mbit (×8)
512 Mbit (×8)
256MB 1R×16 PC2–5300U–444–12–C1
512MB 1R×8 PC2–5300U–444–12–D0
512MB 1R×8 PC2–5300E–444–12–F0
1GB 2R×8 PC2–5300U–444–12–E0
1GB 2R×8 PC2–5300E–444–12–G0
256MB 1R×16 PC2–5300U–555–12–C1
256MB 1R×16 PC2–5300U–555–12–C1
512MB 1R×8 PC2–5300U–555–12–D0
512MB 1R×8 PC2–5300U–555–12–D0
512MB 1R×8 PC2–5300E–555–12–F0
1GB 2R×8 PC2–5300U–555–12–E0
1GB 2R×8 PC2–5300U–555–12–E0
1GB 2R×8 PC2–5300E–555–12–G0
1 Rank, Non-ECC
1 Rank, Non-ECC
1 Rank, ECC
2 Ranks, Non-ECC
2 Ranks, ECC
1 Rank, Non-ECC
1 Rank, Non-ECC
1 Rank, Non-ECC
1 Rank, Non-ECC
1 Rank, ECC
2 Ranks, Non-ECC
2 Ranks, Non-ECC
2 Ranks, ECC
512 Mbit (×16)
512 Mbit (×8)
512 Mbit (×8)
512 Mbit (×8)
512 Mbit (×8)
512 Mbit (×16)
512 Mbit (×16)
512 Mbit (×8)
512 Mbit (×8)
512 Mbit (×8)
512 Mbit (×8)
512 Mbit (×8)
512 Mbit (×8)
Compliance Code
2)
Description
SDRAM
Technology
Rev. 1.41, 2007-05
03292006-EZUJ-JY4S
5
QIMONDA [ QIMONDA AG ]
