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HYS64T256020HU-3-A 参数 Datasheet PDF下载

HYS64T256020HU-3-A图片预览
型号: HYS64T256020HU-3-A
PDF下载: 下载PDF文件 查看货源
内容描述: 240针无缓冲DDR2 SDRAM模组 [240-Pin Unbuffered DDR2 SDRAM Modules]
分类和应用: 存储内存集成电路光电二极管动态存储器双倍数据速率
文件页数/大小: 61 页 / 3202 K
品牌: QIMONDA [ QIMONDA AG ]
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Internet Data Sheet
HYS[64/72]T256xxxHU–[3/…/5]–A
Unbuffered DDR2 SDRAM Modules
3
3.1
Electrical Characteristics
Absolute Maximum Ratings
TABLE 10
Absolute Maximum Ratings
Caution is needed not to exceed absolute maximum ratings of the DRAM device listed in
at any time.
Symbol
Parameter
Rating
Min.
Max.
+2.3
+2.3
+2.3
+2.3
Unit
Note
Storage Temperature
–55
+100
1) When
V
DD
and
V
DDQ
and
V
DDL
are less than 500 mV;
V
REF
may be equal to or less than 300 mV.
2) Storage Temperature is the case surface temperature on the center/top side of the DRAM.
V
DD
V
DDQ
V
DDL
V
IN
,
V
OUT
T
STG
Voltage on
V
DD
pin relative to
V
SS
Voltage on
V
DDQ
pin relative to
V
SS
Voltage on
V
DDL
pin relative to
V
SS
Voltage on any pin relative to
V
SS
–1.0
–0.5
–0.5
–0.5
V
V
V
V
°C
1)
Attention: Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect reliability.
TABLE 11
DRAM Component Operating Temperature Range
Symbol
Parameter
Rating
Min.
Max.
95
°C
1)2)3)4)
Unit
Note
T
OPER
Operating Temperature
0
1) Operating Temperature is the case surface temperature on the center / top side of the DRAM.
2) The operating temperature range are the temperatures where all DRAM specification will be supported. During operation, the DRAM case
temperature must be maintained between 0 - 95 °C under all other specification parameters.
3) Above 85
°C
the Auto-Refresh command interval has to be reduced to
t
REFI
= 3.9
µs
4) When operating this product in the 85 °C to 95 °C TCASE temperature range, the High Temperature Self Refresh has to be enabled by
setting EMR(2) bit A7 to “1”. When the High Temperature Self Refresh is enabled there is an increase of
I
DD6
by approximately 50%
Rev. 1.32, 2006-09
03062006-5RK8-1X8J
16