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FM25L16 参数 Datasheet PDF下载

FM25L16图片预览
型号: FM25L16
PDF下载: 下载PDF文件 查看货源
内容描述: 16Kb的串行FRAM存储器3V [16Kb FRAM Serial 3V Memory]
分类和应用: 存储
文件页数/大小: 14 页 / 146 K
品牌: RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
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FM25L16
WP
CS
HOLD
SCK
Instruction Decode
Clock Generator
Control Logic
Write Protect
512 x 32
FRAM Array
Instruction Register
Address Register
Counter
SI
11
8
Data I/O Register
3
Nonvolatile Status
Register
SO
Figure 1. Block Diagram
Pin Descriptions
Pin Name
/CS
I/O
Input
Description
Chip Select: This active low input activates the device. When high, the device enters
low-power standby mode, ignores other inputs, and all outputs are tri-stated. When
low, the device internally activates the SCK signal. A falling edge on /CS must occur
prior to every op-code.
Serial Clock: All I/O activity is synchronized to the serial clock. Inputs are latched on
the rising edge and outputs occur on the falling edge. Since the device is static, the
clock frequency may be any value between 0 and 18 MHz and may be interrupted at
any time.
Hold: The /HOLD pin is used when the host CPU must interrupt a memory operation
for another task. When /HOLD is low, the current operation is suspended. The device
ignores any transition on SCK or /CS. All transitions on /HOLD must occur while
SCK is low.
Write Protect: This active low pin prevents write operations to the status register. This
is critical since other write protection features are controlled through the status
register. A complete explanation of write protection is provided on pages 6 and 7.
Serial Input: All data is input to the device on this pin. The pin is sampled on the
rising edge of SCK and is ignored at other times. It should always be driven to a valid
logic level to meet I
DD
specifications.
* SI may be connected to SO for a single pin data interface.
Serial Output: This is the data output pin. It is driven during a read and remains tri-
stated at all other times including when /HOLD is low. Data transitions are driven on
the falling edge of the serial clock.
* SO may be connected to SI for a single pin data interface.
Power Supply (2.7V to 3.6V)
Ground
SCK
Input
/HOLD
Input
/WP
Input
SI
Input
SO
Output
VDD
VSS
Supply
Supply
Rev. 3.0
Aug. 2006
Page 2 of 14