RTL8110S-32/RTL8110S-64
Datasheet
Symbol
tdis
tdih
tdos
tdoh
tsv
Parameter
DI Setup Time
DI Hold Time
DO Setup Time
DO Hold Time
CS to Status Valid
EEPROM Type
9346/9356
9346/9356
9346/9356
9346/9356
9346/9356
Min.
400/50
400/100
2000/500
Max.
Unit
ns
ns
ns
ns
ns
2000/500
1000/500
7.7. PCI Bus Operation Timing
7.7.1.
PCI Bus Timing Parameters
Table 17.
Symbol
T val
T
val(ptp)
T on
T off
T su
T su(ptp)
Th
T rst
T rst-clk
T rst-off
Trrsu
Trrh
T rhfa
T rhff
Parameter
CLK to Signal Valid
Delay-bused signals
CLK to Signal Valid
Delay-point to point
Float to Active Delay
Active to Float Delay
Input Setup Time to
CLK-bused signals
Input Setup Time to
CLK-point to point
Input Hold Time from
CLK
Reset active time after
power stable
Reset active time after
CLK STABLE
Reset Active to Output
Float delay
REQB to REQ64B
Setup Time
RSTB to REQ64B
Hold Time
RSTB High to First
configuration Access
RSTB High to First
FRAMEB assertion
PCI Bus Timing Parameters
66MHz
Min
2
2
2
14
3
5
0
1
100
40
10*Tcyc
0
2^25
5
50
10*Tcyc
0
2^25
5
50
7
10
0
1
100
40
Max
6
6
33MHz
Min
Symbol
2
11
2
2
28
12
Parameter
ns
ns
ns
ns
ns
ns
ns
ms
us
ns
ns
ns
clocks
clocks
Integrated Gigabit Ethernet Controller
24
Track ID: JATR-1076-21
Rev. 1.4